Three-Day Conference and Exhibition to Include Exciting Panels on NAND Flash Controllers, SSDs, DDR3 DRAMs, and Low Power Memory Subsystems

SUNNYVALE, Calif., May 28, 2009 —Denali Software, Inc., today announced the final agenda for MemCon Silicon Valley 2009, the largest worldwide conference addressing business, market applications, device technologies, and standards for memory and storage. This year’s conference and exhibition will feature keynotes, technical tutorials, panels on timely topics, and exhibits demonstrating the newest products, applications and technologies from the industry’s leading companies this June 22-24 at the Hyatt Regency Santa Clara, CA. To access the free registration and agenda details, visit: www.memcon.com/agenda.

“For memory design engineers, Denali MemCon remains a high-value event with applicable technical presentations, relevant exhibits and key networking opportunities,” said Ed Doller, chief technology officer at Numonyx and Denali MemCon 09 keynote speaker. “Numonyx is looking forward to its participation again this year as speakers, panelists, exhibitors and partners within the engineering community.”

The highlight of the Denali MemCon 2009 agenda will be four keynotes from industry luminaries Ed Doller, CTO at Numonyx, Jim Elliot, vice president of Memory at Samsung Semiconductor, Mark Gogolewski, CTO at Denali Software, and Ken Hansen, senior fellow and vice president at Freescale Semiconductor. The MemCon agenda also includes over 25 presentations and 4 panels addressing NAND Flash controller segmentation and capability, the critical challenges and opportunities for SSDs, DDR3 DRAM market adoption, and the trends and solutions for low-power memory subsystems.

“It’s readily apparent that there are plenty of educational, marketing and networking opportunities at MemCon of value to designers, technologists and OEM staffers,” stated Jim Elliott, vice president, Memory marketing, Samsung Semiconductor. “Attendees will find Samsung’s presentations and exhibits in particular to be highly informative as we speak directly to innovations and trends that are driving success in these challenging times.”

The agenda also includes a special parallel track, “Beyond Flash - Defining Storage Class Memories (SCM),” brought to you by Web-Feet Research. For more information about the special MemCon track sponsored by Web-Feet Research, contact: alan.niebel@web-feetresearch.com or +1 (831) 373-1985. Following MemCon is the “JEDEC LPDDR2 Symposium” on Thursday, June 25 at the Hyatt Regency Santa Clara. This in-depth introduction to the new LPDDR2 Low-Power Memory Standard will focus on LPDDR2’s operational characteristics, the changes from prior generation memory technology, its groundbreaking shared NVM/SDRAM interface and more. To register: http://www.jedec.org/Home/trade_events/lpddr.

This year’s Denali MemCon corporate platinum sponsors are Samsung Semiconductor and Rambus. Additional sponsoring and exhibiting companies and organizations include: Agilent, Arasan, Denali, DFI, Easy Co., Freescale Semiconductor, Fusion-io, IBM, Intel, JEDEC, Marvell, Micron, Numonyx, ONFi, SanDisk, SandForce, Seagate, SPMT, STEC, ST Microelectronics, Unity Semiconductor, Virident, Web-Feet Research and Western Digital.

High-Quality PCI Express 2.0 Controller IP Core and Verification IP Speeds Netronome’s High-Performance, Power Efficient, Network Processor Time-to-Market

SUNNYVALE, Calif., May 27, 2009 — Denali Software, Inc., a world-leading provider of electronic design automation (EDA) software and intellectual property (IP), today announced that Netronome Systems has deployed Denali Databahn™ PCI Express (PCIe) design cores, MMAV™ and PureSpec™ verification IP, which support the latest PCIe I/O virtualization (IOV) specifications from the PCI-SIG, in designing their new, high-performance Network Flow Processor NFP-3240, targeting unified computing architectures. Netronome's architects and engineers used Denali's Databahn IP cores, MMAV and PureSpec verification IP products to accelerate the design and verification of this processor, and speed overall deployment of PCI Express technology.

“To scale network performance to 10Gbps and beyond, the NFP-3240 offers a fully compliant PCIe v2.0 implementation including SR-IOV with 256 queues for network I/O co-processing in heterogeneous IA/x86 designs. When faced with the important decision as to which IP vendor has the most reputable and silicon-proven PCI Express IP, Denali Software was the preferred vendor that met our critical high throughput and feature requirements,” states Jim Finnegan, senior vice-president of silicon engineering at Netronome. “We rely on Denali’s high-quality, interoperable design and verification IP solutions and excellent customer support to meet the PCIe 2.0 and IOV specifications, our product development timeframes, and achieve a competitive advantage.”

Netronome’s NFP-3240 provides intelligent packet processing in a power-efficient design, and is targeted for designers of communications equipment whose network processing requirements extend beyond simple forwarding. The high-performance NFP is powered by 40 multi-threaded programmable networking cores, and runs at 1.4 GHz to deliver over 56 billion instructions per second and 320 hardware threads that optimize memory utilization, allowing for 1800 instructions per packet at 30 million packets per second. This enables 20Gbps of L2-L7 deep packet processing with line-rate security and I/O virtualization for millions of simultaneous flows. The NFP is also power efficient, operating at only 15 to 35 watts, and delivering over 1.84 BIPS, more than double the efficiency of any similar products.

“As the leading provider of IP solutions for PCIe and IOV technology, we continually strive to provide high-quality and configurable PCIe interface IP solutions for our customers, such as Netronome, to reduce their design risk and enable them to develop complex chips on schedule,” remarks David Lin, vice president of Marketing for Denali Software. “We value Netronome's confidence in Denali and are pleased that our design and verification IP products sped their design time and that their performance goals were met.”

About Databahn PCI Express Solutions
Denali's Databahn PCIe cores and PureSpec verification IP software for PCI Express provide full support of the Address Translation Service specification, Single-Root I/OV, including physical and virtual function (VF) configuration spaces, VF Alternate Routing-ID, and Functional Level Reset (FLR) capabilities. For more info about Databahn and PureSpec, visit www.denali.com/products/.