TweakTown’s crew visited A-DATA’s manufacturing floor during Computex in Taiwan and shot video of A-Data’s entire manufacturing and test process. If you haven’t seen how SSDs are manufactured, this video will give you a pretty good idea of how it’s done, what kind of machines you use, and how much manual labor a vendor like A-DATA puts into its SSDs. If you are already familiar with the SSD manufacturing process, I’d still wager that you’ll pick up a tip or three looking at this 13-minute video. (Just ignore the fact that Chris the narrator misidentifies a solder-screening machine as a component-designator silkscreener. This video is quite informative to the careful observer nevertheless.)

Note: TweakTown has subsequently made this YouTube video private, so it's no longer viewable. We're leaving the link up in case they change their mind.

For one thing, this video shows that you really don’t need much machinery or complex machinery to manufacture an SSD. Unlike the close physical manufacturing tolerances needed to machine precise mechanical parts for HDDs and the clean-room measures you need to take to keep debris off of hard-disk platters during HDA assembly, SSD manufacturing floors are stereotypical of any surface-mount electronic manufacturing line and use the same SMT machines you’d find anywhere to make pretty much anything electronic. Testing and burn-in equipment appear stereotypical for electronics manufacturing as well, based on rows of naked PC motherboards offering open SATA ports just waiting to be plugged with SSDs for testing. A-DATA’s SMT line looks like a relatively low-volume manufacturing line, considering the number of hand operations shown in the video.

Another interesting segment of this video is a walk through the area running SandForce’s test software. The editing crew had to fuzz out the screen images to protect SandForce’s proprietary test software. A-DATA’s S559 SSD incorporates SandForce’s SF-1222 NAND Flash controller. You won’t learn much about those SandForce test tools, other than the observation that they are being kept secure from prying eyes.

You can see the full TweakTown writeup at http://www.tweaktown.com/articles/3342/how_to_make_an_ssd_touring_a_data_s_taipei_factory/index.html

DDR (double data rate) memory chips mounted on DIMMs have long been the mainstay of the PC and server industries. The resulting sales volumes often make these DIMMs the best value available today in terms of cost per bit. PC DIMMs have been 64 bits wide through all DDR generations from the original DDR (also called DDR1) parts to today’s DDR3 chips. Many embedded designs also use PC DIMMs because their high sales volumes make them a relatively cheap source of high-capacity DRAM. However, DDR3 memories have one key characteristic that may make 64-bit DDR3 DIMMs a poor choice for many embedded designs: DDR3 SDRAMs use an 8n prefetch architecture (eight bits fetched or stored in parallel from the memory array per DDR3 data pin) to keep pace with ever-escalating RAM capacity and memory transfer rates while keeping memory bit-cell access speeds and cycle times reasonable. As a result, DDR3 SDRAMs only support 8-beat data bursts so DDR3 chips integrated into PC DIMMs with 64-bit word widths will transfer 64 bytes per data burst. While 64-bit DDR3 DIMMs match up well to microprocessors with 64-byte cache-line buffers, they do not work very well with microprocessors that have 32-byte cache-line buffers and many embedded processors still employ such buffers.

Burst-length options for SDRAMs decrease with each new SDRAM generation as memory-chip capacity has become larger and as transfer rates climb—both of these trends drive the need for larger and larger prefetches within the SDRAM’s on-chip memory array. The first SDR (single data rate) SDRAMs could support four data-burst lengths: 1, 2, 4, and 8 beats. First-generation DDR SDRAMs support three burst lengths: 2, 4, and 8 beats. DDR2 SDRAMs support only two burst lengths: 4 or 8 beats. DDR3 SDRAMs only support 8-beat bursts. Consequently, DDR3 DIMMs with their 64-bit data width and 8-beat bursts will transfer 64 bytes per data burst.

But wait, you say. Isn’t there a burst-chop feature in DDR3 that cuts the data burst to 4 beats. Yes, that’s correct. A DDR3 BC4 burst chop will essentially mask the last 4 bits of the burst thus reducing the number of clocks needed for Read-to-Write, certain Write-to-Read, and certain Write-to-Precharge transitions within the DDR3 state space. However, back-to-back reads and writes (Read-to-Read or Write-to-Write transitions) must always employ BL8 timing resulting in no clock-cycle reduction even when DDR3’s burst chop is used. Even the transactions that benefit from BC4 timing will still run into tRC and tFAW timing restrictions that further limit DDR3 performance. All of these factors mean that using DDR3’s burst-chop mode greatly complicates control of DDR3 memory and the limited performance gains made at the cost of greatly complicated memory control make effective use of DDR3’s burst chop mode fairly impractical.

So in reality, there are only three good solutions to the problem of DDR3’s 8-beat data bursts for embedded (non-PC, non-server) designs:

1. Don’t use 64-bit DDR3 DIMMs for embedded processors that have 32-byte cache-line buffers. Instead, use individual DDR3 SDRAM chips organized in a 32-bit configuration if DDR3 SDRAM turns out to be the best way for you to meet cost and performance design goals for the memory subsystem.

2. Use DDR2 or LPDDR2 memory or an even older generation of SDRAM if you can meet your performance and economic design goals this way. However, keep in mind that older DDR memories tend to rise in price over time as their popularity, sales volumes, and availability decrease.

3. Pick an embedded processor with a 64-byte cache line buffer and then go ahead and use DDR3 DIMMs.

It’s also a really good idea to design the SDRAM controller and PHY to work with multiple SDRAM generations, as discussed in this blog previously. (See the description of ST Microelectronic’s SPEAr1300 embedded processor, http://j.mp/crUOBg, for an example.)

As long as PC and server sales consume the bulk of the SDRAMs manufactured—because each PC and server tends to use a lot more SDRAM than most embedded designs—the memory requirements of the relatively few PC and server processors will continue to outweigh the needs of the embedded processors in the much larger annual unit sales of mobile and embedded products when memory vendors determine what SDRAM features they will provide to the market. Your job as a system designer is to deal with the realities of the memory market and optimize your embedded design accordingly.

Storage analyst and Grand Poobah Jim Handy has just released a free White Paper titled “NAND Cache is Back: SSD Performance at an HDD Price” and it’s worth a look if you are interested in either the market for NAND Flash or have any interest in PC and server storage. The reason this White Paper is worth a look is because Handy goes into substantial quantitative detail with extensive graphs in his analysis and mapping of the intersection between NAND Flash memory and HDD storage. SSDs aren’t taking the consumer- and client-class PC world by storm, as Handy’s plots demonstrate, because large amounts of storage based on NAND Flash continues to cost about 20x per Gbyte more than HDD storage. For that price differential, most people strongly prefer high-capacity HDDs over SSDs. In fact, writes Handy, SSD penetration into PC sales is still less than 1%. However, NAND Flash caches combined with HDD storage can achieve near-SSD performance and HDD capacities at substantially lower cost than can SSDs, and Handy forecasts a bright future for such caches.

Using NAND Flash to boost HDD performance in PCs isn’t new. Handy’s White Paper ticks off prior attempts including Intel’s Robson/Turbo Memory and Braidwood and Microsoft’s ReadyBoost. He cites two reasons these technologies didn’t become part of mainstream PC hardware. The first reason was that some of these attempts used an inadequate amount of NAND Flash memory. A cache needs to be larger than the next memory in the hierarchy—RAM in this case—or the cache will not be effective and the resulting performance gain will be unimpressive. The other issue, he writes, is that the support software wasn’t quite there.

Handy’s White Paper then delves into the real cost of NAND Flash memory, from which he derives a fascinating model of how much NAND Flash cache PC users might feel they can afford. His conclusion is that the cost of the NAND cache must fall somewhere between 20% and 200% of the cost of the PC’s HDD. Based on the consistent, longstanding 20x price difference between NAND Flash and HDD storage, that 20x price differential translates into a NAND Flash capacity of anywhere between 4% and 40% of the associated HDD’s capacity. Although that’s Handy’s bottom line in this White Paper, I think you’ll really find it worthwhile to download and read the full White Paper to see how Handy arrives at this conclusion. This part of Handy’s White Paper addresses the issue of NAND Flash cache size from the perspectives of cost and effectiveness. The rest of the White Paper addresses the issue of support software. This latter part of the White Paper discusses Denali’s Dataplex storage-management software and its performance based on the SYSmark performance numbers. Handy concludes this section by writing “a low-cost NAND cache is significantly more likely to penetrate the PC than an expensive SSD, especially if it can yield 80% or more of the performance of an SSD for only a fraction of the added cost.”

The final part of Handy’s White Paper then analyzes the effect NAND Flash caches will have on the overall NAND Flash market if Flash caches successfully penetrate the PC arena. Handy has a pretty surprising conclusion and I’m not going to preempt his White Paper by disclosing the conclusion here. Go get the White Paper and see for yourself. It’s free and available on Handy’s Web site at http://www.objective-analysis.com/. Scroll down to the well-camouflaged “White Papers” section on the home page and click on the line that reads “Denali's Dataplex, NAND Cache is Back! Click HERE.”

Hitachi just shaved 2.5mm off of the top of its 2.5-inch laptop hard drives, producing a line of 5400- and 7200-rpm, single-platter HDDs called the Z series (Z is the height axis, get it?) with capacities of 160 to 320 Gbytes. (Press release here.) Although there are standard specs for a 2.5-inch drive’s width and depth, height is not part of the size spec but some heights have become de facto standards. Initially, 2.5-inch HDDs were taller but the 9.5mm height became popular as notebooks got slimmer and slimmer. Now 2.5-inch, 12.5mm-thick HDDs with multiple platters are only used when drive capacity is more important than slimness. Hitachi has decided to terminate all 9.5mm-high, 2.5-inch HDDs in favor of drives with the 7mm height for single-platter HDDs. Hitachi will still offer 2.5-inch, 9.5mm drives with multiple platters.

The 7mm-high drives are supposedly plug and mounting-screw compatible with the 9.5mm-high HDDs, which allows Hitachi to replace all of its single-platter, 2.5-inch HDDs with 7mm units. There’s also supposedly no cost adder for the smaller drives, and no discount for the reduced amount of material used to fabricate the drive. Going forward, the single-platter drives will just be physically smaller.

If Hitachi’s new “thinner” 2.5-inch HDD form factor becomes popular—and in a world where you can never be too thin or too rich, the smaller form factor has a very good chance of becoming popular—then there are clear implications for SSDs that try to emulate the form factor of existing HDDs. If laptop, netbook, and even iPad cloners decide they like Hitachi’s new 7mm height, which is likely, then SSD vendors will need to emulate that 7mm height because new drive slots will only accommodate HDDs that are 7mm high. To paraphrase an old saying, you can’t shove a 9.5mm drive into a 7mm slot.

As discussed last week in this blog, Hitachi-LG Data Storage (HLDS)—an OEM vendor of optical drives that’s a joint venture between Hitachi and LG—introduced a combo optical/solid-state drive called HyDrive last week at Computex 2010 in Taipei with a few more technical details about the drive. (See: How does a hybrid SSD/optical drive make sense?) The initial version of the HyDrive will reportedly be based on a DVD burner/Blu-ray disc player with 32 or 64 Gbytes of NAND Flash configured as an SSD. One 3-Gbps SATA II interface accesses both the optical and solid-state drives in the first-generation HyDrive. The internal SSD controller is enhanced with “Defect Management technology” that allows the SSD to buffer the data streaming from the optical disk to smooth the gaps and jumps in the playback stream caused by lapses in the stream due to scratched optical media as demonstrated by the video clips discussed in the previous blog entry.

The HLDS press release says that the HyDrive’s on-board controller can boost a host PC’s performance in one of two ways:

1. The entire on-board SSD can operate as a cache using a Windows filter driver supplied by HLDS.
2. Part of the on-board SSD can be used to image the Windows operating system and applications, speeding boot and application-loading times by 30 to 60%. Whatever remains of the SSD capacity is used as a cache.

The first-generation HyDrive is thick—12.7mm—so it doesn’t fit into existing laptop slots for optical drives. However, HLDS says that first-generation HyDrives will ship in the MN 102-O Family PC from entertainment-PC vendor Moneual Lab in August with general availability scheduled for September. HLDS also announced plans to reduce the thickness of second-generation HyDrives to 9.5 mm, making many more optical-drive slots available for the storage product. The second-generation HyDrive is also expected to have a maximum SSD capacity of 256 Gbytes, will offer a faster SATA III 6-Gbps interface, and is expect to debut in March, 2011.

System designers may want to think carefully about the architectural implications of the HyDrive approach, which multiplexes one SATA interface between the SSD and the optical drive. The SATA II interface has ample bit capacity for playing Blu-ray video, which requires less than 50 Mbps. However, LG already offers a 10x Blu-ray drive, so the optical drive section of the HyDrive might consume a substantial portion of the first-generation HyDrive’s SATA II interface. Any portion of the SATA interface’s bandwidth consumed by the optical drive is not available for the SSD when both drives are operating and, of course, there’s always overhead to deal with when multiplexing one interface to two drives, which will play a factor in the ultimate performance of the HyDrive approach even with the second-generation’s faster SATA III interface.

There’s also the physical form factor of the optical drive to consider. The inability to stuff the SSD into a laptop-compatible optical drive’s physical envelope in this first-generation HyDrive shows that integrating an SSD into an optical drive isn’t as simple as adding a circuit board to an existing product. Tighter and more pervasive integration is required. Yet there will still be compromises when that closer integration takes place because the SSD can only be allocated so much volume within the drive’s envelope. Some of the optical drive’s components including the disc bay, drive motor, and head/actuator mechanism have irreducible volumes (or nearly so). As a result, the SSD’s data capacity will be severely limited by the volume made available to it within the HyDrive.

The HyDrive concept makes life theoretically easier for PC and laptop vendors by creating a plug-and-play way to install an SSD into a PC or laptop. However, bundling an optical drive with an SSD in one physical envelope that was previously reserved and optimized for the optical drive alone entails its own set of engineering compromises with respect to data capacity and transfer rate. Contrast this approach with one that places a tailored SSD or Flash cache somewhere else within the PC or laptop. Doing so allows the SSD to use unusually shaped volumes within the mechanical design of the laptop or PC and to have undivided use of much faster interfaces, such as the PCIe interface that’s become abundant in chipset designs. An unbundled approach to NAND Flash caching within a PC or laptop allows system designers to make their own product-specific compromises to better deliver the SSD’s value in terms of speed, performance, and capacity, which in turn commands more revenue from the consumer.

A few days ago, this blog discussed the “big resistor” model of SDRAM power consumption (see Marc Greenberg’s “big resistor” model of semiconductor DRAM power consumption) and that blog entry ended with this statement:

“It might also be a very good idea to design your system so that it can accommodate more than one DDR variant. That way, time and circumstance can determine which DRAM technology gets used at any given time. That idea, coincidentally, is the topic of a Denali White Paper scheduled to be released in the near future.”

Well, designing advanced SOCs so that they can mate with multiple generations of SDRAMs is not just a nice recommendation based on a convenient theory—it happens in the real world. Case in point: ST Microelectronics’ announcement of the company’s new SPEAr (Structured Processor Enhanced Architecture) 1300 family of embedded microprocessors that target high-performance connectivity and embedded applications.

ST Micro’s new embedded microprocessor family typifies the current evolutionary step in high-end embedded processing platforms. The SPEAr1300 embedded processor family is based on a 600-MHz, dual-core implementation of ARM’s Cortex-A9 32-bit microprocessor. Each of the two Cortex-A9 processor cores has separate 32-kbyte L1 SRAM instruction and data caches and the chip adds a unified 512-kbyte L2 SRAM cache and a 32-kbyte boot RAM so the embedded processors in this family can easily handle the processing requirements of many high-end embedded applications. The SPEAr1300 embedded microprocessor family includes a host of different peripheral interfaces commonly used in today’s high-end embedded applications—USB, PCIe, and SATA, for example—and also includes many internal peripherals needed to create complete systems as shown in the block diagram below:

Like most of the embedded microprocessors being designed today, ST Microelectronics’ SPEAr1300 family does not include a lot of on-chip memory beyond the L1 and L2 caches for the dual-core ARM Cortex-A9. Yet that 600-MHz dual core processor will have quite a thirst for instructions and data so a large memory must be somewhere nearby. Like most SOCs designed today, the SPEAr1300 processor family is designed to mate to the current leader in low-cost memory storage: DDR SDRAMs. To do this, the SPEAr1300 devices include a DDR SDRAM controller capable of driving either DDR2 or DDR3 SDRAM. This conservative design approach—accommodating two generations of SDRAM—grants system designers maximum leeway and flexibility in developing systems along a wide price/performance continuum and will help to drive the chips’ sales volumes by making sure that the embedded processors suit the widest possible range of applications.

As previously mentioned, Denali will soon release a White Paper discussing the topic of multigenerational DDR SDRAM support in more detail.

Some combinations like chocolate with peanut butter, ice cream with peanuts and chocolate sauce, and HDDs with NAND Flash caching make obvious sense. Other combinations don’t make such an obvious match. In these cases, people need extra convincing. LG and Hitachi are suggesting just such a non-obvious combo as a concept: an optical drive and NAND Flash. Optical drives? Aren’t they on the way out, like floppy disks? Not really. We still use them to play Blu-Ray and DVD videos, right? And we’ve all experienced the problems associated with scratched or defective video discs, right? So the two backers of the HyDrive optical disc/NAND Flash combo put this extremely short, extremely effective video together to prove the utility of fortifying an optical disc with NAND Flash:

That’s enough to make a believer out of me.

Oh yes, once it’s in the system, the NAND Flash in the optical drive is also available to help accelerate the HDD as well, with the appropriate drivers. The HyDrive concept demonstrates once more that getting NAND Flash into a PC, in some way, can be a real performance booster for a wide variety of applications. Perhaps even wider than is intuitively obvious.

EETimes' Junko Yoshida just published an article titled “5 reasons why Samsung scares Japan” (http://www.eetimes.com/news/latest/showArticle.jhtml?articleID=225200248) that discusses five major reasons why Samsung has become the manufacturing powerhouse that it is today. There’s no question that in semiconductor memory, Samsung is a true industry leader. According to DRAMeXchange, Samsung was the dominant player in semiconductor DRAM, with a 32.3% market share in 1Q2010, and the company held an even more dominant position in NAND Flash during the same period, with a 38.3% market share. (During this same period, Hynix was the #2 DRAM player with a 21.5% market share and Toshiba was the #2 NAND Flash player with a 32.4% market share, again according to DRAMeXchange.)

Without a doubt, Samsung currently holds an impressive lead in semiconductor memory manufacturing—at least from a market-share perspective. Further, as the last part of Yoshida’s article discusses, Samsung’s announced plans to more than double its capital expenditures this year versus 2009 are clearly aimed at keeping Samsung in the lead.

Not so coincidentally, Samsung is giving a keynote at MemCon 2010, being held on July 28. Register here: https://www.denali.com/en/memcon/2010/

To see the DRAMeXchange 1Q2010 DRAM vendor ranking, go here: http://www.dramexchange.com/WeeklyResearch/Post/2/2358.html

To see the DRAMeXchange 1Q2010 NAND Flash vendor ranking, go here: http://www.dramexchange.com/WeeklyResearch/Post/2/2365.html