Yesterday, ST-Ericsson announced a new smartphone platform called the U8500 which employs a Denali Databahn SDRAM controller and STMicroelectronics’ DFI-compliant Physical IP (PHY) and state-of the-art 1.2V LPDDR2 Input/Output pads to control off-chip LPDDR2 DRAM (see First Silicon Success With LPDDR2 SDRAM Controller IP For High-Performance, Low-Power SoC). While DDR3 memory is starting to become the mainstream SDRAM technology of choice for PCs and servers, LPDDR2 is poised to become the DRAM technology of choice for embedded and mobile applications like smartphones thanks to its low-power characteristics. Last year, on the first day of MemCon 09, Denali’s Director of Technical Marketing Marc Greenberg gave a 2-hour tutorial on low-power DDR SDRAM and he discussed this transition during that presentation. I blogged that tutorial for www.low-powerdesign.com last June and just saw Marc give essentially the same information yesterday during a Denali memory training session for customers, so it’s both timely and worthwhile to revisit the topic.
Memory power consumption as a percentage of system power consumption has grown over time with the rapid growth of memory-array size in all sorts of systems. A real eye opener at MemCon 09 was a chart on the power consumption of memory in server systems, where large server memory arrays consume as much as 40% of the system power and the processor now consumes a mere 28%. Why is that important? It’s important because big server users like Google pay tens of millions of dollars each year in electrical power costs to run and to cool their server farms and 40% of a few tens of millions of dollars is a lot of money. Note that the current share-of-power percentages for servers don’t make processor power consumption unimportant-28% is still a big number-but the clear message is that server designers must now be far more concerned with memory power consumption because it’s a big part of the power puzzle. As mobile and embedded designs use larger and larger DDR memory arrays for bulk memory, the same sort of situation applies because heat dissipation and energy consumption are now critical design factors in most of these designs. Embedded designers must be aware of the way their DRAM choices affect system power consumption.
This first slide from Marc’s MemCon 2009 presentation shows the optimum type of SDRAM to use based on a design’s memory-capacity and speed requirements. I liked this slide a lot because it provides a quick guide to picking from the wide array of available DDR types and speeds. Note that DDR2 and DDR3 DRAM are at the high end in terms of both bit capacity and bandwidth, but most embedded designs do not require and cannot afford PC-class memory. Before LPDDR2 became available, LPDDR1 and even earlier technologies at various speed ratings and bit widths were considered for mobile and embedded applications.
The following slide from Greenberg’s tutorial shows how the availability of LPDDR2 changes the design landscape significantly. LPDDR2 memory delivers the low-power goods by operating the SDRAM’s memory core and I/O at 1.2V, which is what you need to do to substantially cut memory power these days. In addition, the LPDDR2-NVM non-volatile memory specification allows you to intermix LPDDR2 DRAM and some form of non-volatile semiconductor memory such as NOR Flash; they can share the same memory bus and the same memory controller.
At last year’s MemCon, Greenberg discussed the possibilities of NOR Flash appearing with LPDDR2-NVM interfaces. Yesterday during the memory training session, he seemed to feel that PCM (phase-change memory) was more likely to adopt that interface and indeed, Samsung announced a device for mobile applications that pairs SDRAM and non-volatile PCM chips in one package earlier this month (see Samsung announces imminent release of a multichip module integrating DRAM and PCM for Smartphone applications).
Note: MemCon 2010 will be held in Santa Clara on July 28. If you need up-to-the-minute info on what’s happening with semiconductor memory, plan to be there to listen to the industry's leading business and technical experts give their perspectives on the semiconductor memory market. It’s free, so you should register right now while you’re thinking about it. Click here: https://www.denali.com/en/memcon/registration/index.jsp.