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Archives for: July 2009

Denali
07/23/09

Rethinking SSDs?

NAND Flash's SSD Vision: Wholesale replacement of HDDs by SSDs in the huge market for PCs and laptops archival storage has gleamed in the eyes of NAND Flash makers ever since Apple kicked the microHDD out of the iPod Mini and made it a SSD/Flash based iPod nano in 2005. Maybe it occurred even before that, but it had not caught the popular fancy, or seemed within reach until it happened with the 4GB or 8GB MP3 players from Apple. Almost instantly, flash makers set their sights on displacing, over time, huge swaths of the market for HDDs in laptops...250M units a year, variously averaging 160GB-400GB each.

Over the timeframe of 2004 through the end of 2008, NAND Flash came down in price nearly 100x. Most NAND flash applications fell easily under the sway of MLC NAND, with its lower costs (prices), which were gladly accepted in exchange for its reduced performance and endurance (specs). However, much of the SSD space claimed to need, and depend on, SLC NAND for sufficient specmanship and performance. Still, as in all applications, MLC was steadily improved in its performance, and 'patched MLC' NAND, with advanced software and sometimes hardware improvements, eventually became acceptable for many or most HDD replacements.

However, the latest data and analysis from Digitimes [24 Jun 2009: SSD penetration in PC market remains low, Members only] indicates that laptops with SSDs, in 2009, still will be only about 1.5% of total laptop shipments (though Gartner ramps it up to 20% in 2010, but we shall see), and the price of SSDs is most often given as the critical shortcoming amid a host of technical benefits for SSDs, real and perceived: lower operating power, faster reads and writes (easy random accesses), and G-force ruggedness.

But, all performance issues aside (which are now 'no news'), it is the SSD pricing that is keeping them away from wholesale adoption in the compute space.

While some technical criticisms remain, the most significant limitation is cost or price: Corsair's newest 128GB SSD carries a retail price of $414, against a HDD of similar capacity, for which it's easy to find 160GB HDDs for under $100 (and as low as $35). The Corsair SSD line-up has better performance, to be sure: 240MB/sec reads and 170MB/sec writes. But it will probably take a while for the consumer to understand what that means to him in terms of improved workload processing, impatiently waiting for data, and productivity.

Today, one has to ask what this extra $300 might be worth to the user, or how large that class of users who value SSD over HDD, at +$300, might be. Or, is this the BEST place to spend an incremental $300 on a system that costs about $1250 +/- $250, given other software and performance boosters that are available. Adding +25% or so in price is, yes, a significant price uplift for SSD's 'turbo speed' compared to HDD. For sure, some users and applications REALLY need the increased storage speed that SSDs offer. But, most, we think, will likely bide their time and wait for the eventual improvement in the "SSD Value Proposition".

Even in the low-capacity drive space, 32-64GB, SSDs are the high-priced spread, by a wide margin. So unless SSD makers can sell the 'consumer benefits' of their product better, the market will be thin for a while. The eternal hope of SSD and NAND Flash makers, that future NAND price reductions will bring HDDs within striking distance of NAND-based SSDs, is offset by the persistent trend in PC/Laptop applications and use, to 'demand' larger and larger capacity disk HDDs...by up to 20%/year in the high volume PC and laptop segments...today 160GB or 250GB, and tomorrow 200-300GB. Overtaking the HDD-in-laptop capacity trend line is a tall order for SSDs: the larger the drive, the more cost advantage HDDs have.

Put that on top of the fact that what we have seen 'recently' (the past five years) in NAND price reductions is probably an unsustainable trend, and will have to be slowed down due to technical barriers and the current lack of profitability among NAND makers. Nearly exhausted by running so fast for five years, and sinking so much money into technology and fabs, they have barely come close to the lagging end of HDDs, as they find their capital nearly spent.

What we see today in the SSD space, is early adopters, those who REALLY value lower power and better R/W performance of NAND Flash. But so far the price is steep, and a general overtaking of the broader HDD market, at least with pure SSDs, is not in the offing unless something changes pretty dramatically, no matter what the flash price curves look like.

If one looks at the average prices of either laptops or desktops in the past 10-15 years, too, it is down-down-down. There is huge resistance to increasing prices for the "Typical System", no matter what the performance, or what the performance improvement is. Sure, there are high-end systems, more costly and with more performance. There is always a spread of users and applications, from ultra-cheap and performance limited, to ultra-expensive and powerful. But it is the Middle Class where the high volume is. Unless SSDs can crack that nut, they will forever be elite specialty customer plays.

Changing mindsets: So, with the experience of about five years of talking, designing, building and selling SSDs, we collectively have a greater understanding of what might lie ahead, and/or how apparent barriers to SSD adoption might be overcome. For one, our concept of the "Computer-HDD" market, and its applications, has to be de-homogenized and scrutinized several levels deeper than viewing it as some monolithic construct. There are large groups within the market which will embrace SSDs, while others are too price-sensitive to do so. If corporate IT managers can find a way to keep employees from filling up their computers with home movies, vacation photos and other large GB applications, maybe a desktop computer with a 32GB SSD is plenty for most workers' legitimate business needs. This, however, is contrary to the PC trend of the past 30 years, to 'client empowerment'. But, it is not impossible.

Consumers can ask, "What is faster seek time worth, really?" Designers can ask, "Are there interface conventions and legacies that could be circumvented or overcome with some kind of clean-slate, fully optimized flash drive approach?"

So far, the Solid State Disk crowd has been thinking totally IN the box...the box made, defined, interfaced, prescribed by nearly 30 years of HDD-in-PC experience, from the time of the PC-XT in the early 1980s: a pure scaled-down IBM System mainframe memory subsystems...MPU-L1-L2-(L3)-DRAM-Disk-(DVD backup). The form factor and interface of SSDs, so far, is to make them drop-in compatible for HDDs, without disrupting the existing system architecture. Surely, the industry can do better than that, given the power and promise of raw NAND Flash's truly disruptive technologies.

For a while, it looked like the netbook might be the breakaway from HDD, with something of a clean slate on which to draw hardware and system software from the ground up. But though the market is exciting and fast growing, it has not embraced the SSD in a significant or innovative way. In fact, HDDs hold the high ground in the current crop of netbooks, though we are still a long way from the finish line, as varieties of small "computers" proliferate. So, what form of storage will be adopted in this part of the market it is not a settled issue.

Still, for the broad masses of laptops and desktop PCs, a complete SSD solution is probably not within reach any time soon (like, by 2013 or so), though undoubtedly, they will be picked up by early adopters, and those with special workload requirements. Much of the early enthusiasm, and many of the agressive penetration forecasts have been tempered by time, and by the hard market realities.

But, all is not lost, by any means.

Flash Caches are again in the news: Perhaps a more promising approach is a recurrence of flash-caching, in which a smaller SSD (a booster 'flash array', or HDD cache) with good software, can come close to the performance of a full solid state drive, but with the bulk of the system GB still on the HDD, at far lower cost (or 'average cost/GB') for the total system. This concept first appeared years ago in the early days of SSD-talk, but was quickly dismissed in the clamor to go directly to SSDs. Development, more discussion and market, technical and pricing realities for all competitive products have resurrected talk of HDD caching methods and systems. Today, we understand better, we have better flash-cache products, better hardware and software, and we see the naivete of thinking NAND flash would catch and surpass HDD in overall system cost, for the capacities widely in use in computer hard drives.

Author's Note and Errata: There were some errors in the forward NAND pricing in the version of this article as it originally went to the web on Thursday evening, July 16, which have now been corrected. We apologize to 'early readers', who may have been confused by some inconsistencies between the text and tables.

Future NAND price reductions will be much less than what we have experienced: Users of NAND Flash have become accustomed to annual price reductions of 50-60% over the past five years, built on strong GB demand growth averaging more than 150% per year. However, a conspiracy of events...financial, technical, economic and 'perceptual'...are expected to slow this rate of price decline by up to 90% for the next five years: from 100x price/GB improvement to 10x improvements...or even less. In addition, the industry is definitely facing a point where higher performance NAND will truly cost more per GB than lower performance NAND (endurance, RW speeds, or other valuable metrics), just as SLC NAND costs more than MLC today, but is used only in selected 'cost justifiable' applications. When x3 and x4 cells' share of the market grows, and SSDs gain further traction, a highly-fragmented market is almost a certainty, and the hi-low price spread for various flavors of 'flash' could be as large as 5x, solely on differential costs to produce various performance and endurance feature-sets.

In short, the NAND marketplace can be expected to take on a whole new character for the five years out to 2014, as technical progress aimed at cost reduction becomes more expensive and harder to come by, as 'performance degradation remediation' becomes more complex and 'controller-logic-and-software' intensive, as NAND vendors are forced by their managers and shareholding masters to make it a good business, and as new markets cannot develop and expand fast enough to sustain the former GB growth rates.

Most of the low-hanging (technical) fruit for NAND cost-reduction has been picked: In the past five years, lithographic shrinks were at first easy to achieve, as NAND caught and then surpassed DRAM as the 'memory process node leader'. The move from 'SLC to MLC' was low-hanging fruit waiting to happen; almost everyone had proven it out in the lab and fab years earlier, and it just took some 'seed crystals' of market competition to precipitate a wholesale transition in the market (exc. Samsung). Sustained high GB growth brought improved scale economies into play, too, as "SG&A and R&D per GB of NAND shipped" declined almost in proportion to GB growth. Also, much progress in price reduction has come at the expense of beating down manufacturers' profit margins to the point that 4Q08 was 'all red for all vendors and all products'. Indeed, 2008 ended on something of a hard stop to all this, with moves to x3 and x4 cells stalled for a variety of technical reasons, and with troubling performance hits, as well. Manufacturers' profit margins were at bare metal levels, or lower. The "One a Year" lithography shrinks, density-doublings and process node migrations are today not always affordable (tight cash and non-existent profits), but also technically more forbidding. Much new technology has to be investigated and mastered..."85-90nm to nom. 40nm" is far easier than "35-40nm to nom. 20-22nm" is expected for 2014 will be.

The look ahead, pricing progress: The modest NAND price recovery we have seen in 1Q and 2Q is just a time to rest and regroup, but the eventual resumption of price competition and reductions will be much more measured than formerly. No vendor can afford price reductions of ~50%/year any more; no one is capable of cost reductions of anything close to that. Importantly, many of the iconic personalities who bet on the sustainability of the fast growth investment and R&D strategies of the past period are moved on, in light of stubborn markets, declining profits and huge financial damage in the past year.

New NAND demand and markets for growth will also need 'cultivation'...and time: On the demand side, most NAND used today is relatively primitive, compared to its expected technical potential. A vast fraction of the GB used are lodged in applications with modest RW capabilities, tolerance for large innate silicon imperfections and failure rates (then corrected), and limited endurance.

This too, was low hanging fruit: camera chips riding the digital camera transition, USB drives to replace 'floppies', audio store for MP3 players...almost all replacing technologies that were well past their prime. These were also 'ready markets' requiring little market development by vendors, thus avoiding a time-consuming and irregular growth path. It will not be so easy going forward, and the huge price down strides made by NAND in the 2004-09 era are not likely to be matched. One has to look no further than SSDs, to get a feel for the difficulties and costs, the hit and miss, as well as the technical, standard-setting and price-performance roadmaps that have to be argued, developed, applied, rejected or modified for new and sophisticated markets to develop. It is a slow and painstaking development process. In addition, current and forecast prices always attract new applications; if one stifles the outlook, it may stifle the energy seeking new places to take advantage of "Sea Change Pricing" that has been a part of the NAND Marketing Call for many years.

Historical NAND prices, 1Q 2004 through 4Q 2008
            $/GB
  1Q04 1Q05 1Q06 1Q07 1Q08 4Q08
             
All NAND 147.80 40.81 23.97 8.00 4.53 1.62
             
Est. SLC % 95 50 40 20 6 4

"in best of worlds", SLC price is 2x that of MLC, though it has varied widely
over the past several years (see Denali BLOG articles)

Industry's perpetual efforts to cost reduce, and demand diversification, will drive broader product mix: What we see as a still rather narrow line-up of NAND 'performance' capabilities will become a sprawl, as elemental technologies are applied in novel and unique ways to serve diverse markets, having different needs and price points. More bits per cell always (so far, for all vendors and all products) means lower performance. "SLC to MLC" meant endurance dropped by about 10x-20x, from 100K cycles to 5-10K write cycles. For most applications, users would rather have the 'half-price' pricing than the 100K cycles. SanDisk was able to keep performance the same going from x2 to x3, but not without some considerable remediation: productivity went up only 20%, not the expected 50% in bits per mm sq., due to extra 'performance-management' circuitry. Fewer stored electrons per memory bit means more finely tuned sensors, and, almost invariably, more die area, reduced performance and more build cost. In addition, SanDisk seems, a year later, to be the only company with x3 in volume production, and that not even at their most advanced process node, which has deliberately lagged by one node their cutting edge SLC and 2MLC production nodes.

And though a move to x4 would give production cost benefits comparable to those gained when the industry moved lockstep from SLC to MLC in 2004-6, it is no slam dunk technology, by any means. Tight R&D budgets, resulting from huge operating losses for the past year, will not make anything easier. It is not likely, or even not possible, for all NAND vendors to have fully developed their "nom 22nm x4" technology in 2013/14. No chance.

Today, the line up looks as shown in Table 2, NAND Makers lithography, MLC status:

Estimated NAND Makers' Technology Status, Mid 2009:
 
Hynix   48nm (65%); 41nm (35%), no x3 in market
Samsung   51nm (20%); 42nm (70%); 30nm (10%), MLC but no x3 in market
Toshiba/SanDisk   43nm (35%), x3; 32nm (65%) MLC
IMFT   34nm MLC (90%+), no x3 in market
 

note: percentages refer to fraction of wafer starts at that process node

Bold guesses: NAND price outlooks: If NAND prices "today" (using 12/31/08 as 'today') are nom. $2/GB for MLC, then by the close of 2013, we expect to see a smattering of x4 NAND, with severely constrained performance, with best-NAND pricing of about 50-60 cents/GB. SLC and "SLC level performance", needed in some applications, is denied the benefits of the move to more bits per cell, since device performance is too compromised using today's design methodologies, so the $4.00/GB+ for SLC of today maybe declines to less than $1.25/GB by year end 2013, with progress coming largely from litho node moves, making some allowance for moving to sustainable profit margins and better cell constructs and continuing improvements in scale economies.

Estimated NAND prices, 1Q 2009 through 4Q 2013
            $/GB
  1Q09 1Q10 1Q11 1Q12 1Q13 4Q13
             
SLC 4.00 4.00 3.00 2.10 1.45 1.20
MLC 2.00 2.00 1.40 0.95 0.60 0.50
             
x4 NA NA NA 0.50 0.32 0.26
(or lowest perfomance grade)


In fact what we have seen in much of the NAND flash market pricing is a thinly concealed compression of vendors' Gross Margins, coupled with a capacity of chip designers to 'engineer out costly features, performance', which today's NAND end-markets can easily do without...'defining down demand' attributes...and replacing what in retrospect can be viewed as "Cadillac NAND" with "Tinplate" or "Plastic" NAND, at far lower costs to build but fully adequate for most of today's needs. Full priced SLC was shipped in 2004, because there was no half-price MLC. Once MLC became available, it was found to be 'good enough' for 'almost all' applications. But it is not at all clear if x3 and x4 performance, without significant costly 'performance remediation' WILL be 'good enough for those same uses.

Consequences and impacts of price slowdown: This "Sea Change Pricing Model" moving to a new "Change of Heart Pricing Model" can be expected to cause major changes in the industry's view of end markets, vendor investment expectations, competition and potential market consolidation. Importantly, huge NAND price reductions in the past five years have enabled SSDs to barely make a dent in HDDs into PCs; with declines slowing, how does that change our thinking about the outlook for SSDs? This will be the subject of our next BLOG, next week.

The figure below was put forth at the recent Denali MemCon, in a speech by Samsung's Dr. Sylvie Kadivar.

Memory and Memory Subsystems (MSS), long accused of being the bottleneck to higher system performance, and 'throttling' the MPU with their high latencies and addressing limitations, now finds itself also as the "bad boy of power consumption." Other server system elements have made great strides in power reduction, but at the end of the day, memory 'owns' more of the system power consumption than any other system element. Server Farms, recently a sign of 'advanced internet evolution', are now in the Stink Pen insofar as energy consumption is concerned.

And though steps are underway to reduce power of the MSS, after all is said and done, 'It's the Memory Subsystem, Stupid'.

For most memory designs, too, cost reduction (= die size reduction) remains their foremost objective, though, to be sure, power has moved closer to the top of the design objectives list over the past few years. For the 50nm node products, the main benefit appears to be productivity: moving from 65nm to 50nm, plus the evolving benefits of superior designs, give 2x the die/wafer and more performance. Ceteris paribus, however, power comes down only fractionally, unless the 65nm design was 1.5V and the 50nm was 1.35V.

The tools for reducing power consumption among memories, with some liabilities for performance and build cost, are understood, though many possibilities also lie in wait. Reducing operating voltages, as has been the mode recently, is pure goodness; the high-performance speed bins still seem within reach; the user gets 20% power saving, almost for free...x2 to get the power savings for reduced air conditioning and assorted system build costs.

But, one might ask, if this is such low hanging fruit to go from 1.5V to 1.35V, why not go one more step without a pause, to 1.2V, and get double the benefit? And, even 1.2V does not seem to be any other than an 'industry convention'. Systems with 1.0V or even 0.9V have also been demonstrated in test vehicles, and seem fully achievable...though maybe not productionable for all the end markets that DRAMs serve.

Should more finely-segmented arrays be an option that goes back on the table, to reduce power? For complex server DIMMs, with 36 to 72 chips on each of them, is there a place for 'intelligent design', and more informed and advanced control of the elements that make up DRAM power consumption...refresh, chip and array select, power-down modes?

Mobile MSS power issues/concerns: In phones, and in the larger mobile segment, one of the great forces trying to squeeze DRAMs out, comes from the power-concern side: Swapping NVM/PCM for DRAM makes for nonvolatility AND fast read-write. The MSS (meaning, in this case, LP DRAMs + NVM) constitutes up to 30% of standby power consumption in mobile phones, so it is a big hit on talk time, and makers are 'motivated' to get the power down or out.

Laptops and Desktops: Though LP DRAMs of sorts have been around for many years, we know of no laptop computer which uses them. The memory subsystem is not the power hog it is in phones, and the savings by using 'LP' DRAMs over PC DRAMs, is not enough to justify more MSS cost with higher prices DRAMs and 'LP' DIMMs. However, we have seen in just the past six months, an early and quick take-up of DDR3 DRAMs in laptops, highlighting their lower power capability. Some of this is 'green marketing' to concerned buyers, but the power savings are real, though perhaps of little consequence in terms of battery life. BUT, laptop interests, which now make up more than half of PC unit shipments, and their low-cost cousin, netbooks, may be the force that tips the DRAM voltage discussion in favor of a quick move to 1.35V and then 1.2V DRAMs. What's not to like?

For desktops, cost is paramount and they are almost all plugged into the wall. But, so as they have wagged the DRAM tail for so long, maybe they are about to lose control of the DRAM voltage or LP feature roadmap, be hoist by their own petard, and eventually have to make do with 'what the other guys define, and make'...as others so long have had to dance to their fiddle.

With netbooks being the fastest growing computer segment, by a wide margin, and something of a tabula rasa as far as legacy system design constraints, maybe the Netbook marketplace will entice new DRAM lower power technical developments which then will migrate UP into laptops and PCs. With 20M+ units a year, and +2GB per system, maybe DRAM vendors will try for power differentiation in new and innovative DRAM and MSS designs.

Servers: Server DIMMs, historically pushing the chip-density and DIMM density envelopes, pose the microelectronic version of what the server owner reads on his utility bill. Around the server industry today, 8GB and 16GB DIMMs are the new bleeding edge, and even if they use the newer DDR3 DRAMs, or better still, DDR3L, servers are still rather huge power consumers, constraining system design, mandating larger power supplies, heating and cooling, fans airflow, 'hot spots', etc.

IBM Goes from 'Bipolar' to 'CMOS' in early 1990s, dislocates people, fabs and technology roadmaps: Maybe I am reminded of an anecdote I first heard when I went to IBM in 1995. Until IBM decided to reform its chip business in the early 1990s, and let loose of its 'backward' ways, all the close-in and high-speed system caches were bipolar...lagging the merchant industry's embrace of CMOS over HS bipolar which occurred as much as a decade earlier. But, in addition to the fab process problem, letting loose of all its bipolar capacity in Fishkill, NY (vacating Dutchess County, NY, as it closed down and eventually refit its fab to run CMOS), the major complaint came from the board designers, who had gone to great lengths to 'handle the bipolar power problem'...heat sinks, fans, intricate thermal analyses, limitations of chip layout density on the boards...system cost and performance constraints.

This kind of problem the 'memory industry' faces today; whether there is a simple "bipolar-to-CMOS" solution so close at hand as there was in the early 1990s for IBM, remains to be seen, but seems not probable. More likely, the solution will be piecemeal, and made up of many evolutionary changes over a long period of time. In servers, FB DIMMs was a start three or four years ago, to attack the limited address capability of Registered DIMMs and, for sure, some things were learned along the way. But FB DIMMs had no traction, and a limited following, and were subsequently replaced by better (and denser) R DIMMs..and been wholly replaced by a separate discussion for the follow-on generation of server DIMMs, so called Load Reduced (LR) DIMMs. FB DIMMs was maybe the last 'technical challenge' that was pure performance-driven, with little regard for power, which eventually came back to bite them in the AMB.

But the power problem, so long pushed aside in favor of 'more performance', is real, it is here, and it will get worse before it gets resolved.

Denali's 2009 Edition of MemCon, its Annual Storage and Memory-Only Conference held 22-24 June in the Hyatt Regency Hotel in Santa Clara, drew approximately 1150 attendees over three days. After Monday's Denali 'Product Tutorial and Training Sessions', which drew more than 250 attendees, the formal MemCon presentation sessions followed on Tuesday and Wednesday, with nineteen presentations and four panel sessions filling the two days, from 9am until past 6pm.

Fortunately for the memory industry, signs of recovery have been apparent for about the last two or three months, so there was reason for business optimism. But, no matter how much the profits and headcount of Silicon Valley's corporations have been impacted during this worst-ever downturn, new ideas and technical advances just keep on coming. This year's theme, "Beacons of Innovation", was apropos, and MemCon brought new products and technologies to the fore, and improved understanding to more mature discussions and products.

Now nearly forty years old, the 'semiconductor memory industry' is hardly maturing. The industry's future, the technical and standards roadmaps, and the issues are as hotly debated as ever they were, albeit at line geometries that are 100 or 1000 times smaller, and costs that are 100 or 1000 times larger. And, we should add here, risks that are also 1000 times larger. In chips, everything scales up, or scales down!

The full MemCon agenda can be found at www.denali.com/memcon

My favorite take-aways and impressions:

SSD talk; still talk: The topic of SSDs has been a mainstay at Denali's MemCon for about four years, often viewed as the Next Big Thing and market driver for NAND Flash. Indeed, one might surmise that SOME substantial fraction of the est. $35B invested in NAND manufacturing capacity in 2005-08 was exactly for the purpose of supplying that market demand. But with still weak take-up of SSDs from netbooks, to laptops through desktops, and onward to the enterprise market, the bloom is off the rose more than a little, to hear what most speakers were saying: the message is still positive, but manufacturers are clearly disappointed with the size and commitment to today's bona fide "SSD" business level, and probably tomorrow's SSD market outlook. NAND prices are still way too high compared to HDDs, despite declines of 50-60% per year for those same past five or so years. No sooner than one technical 'whattabout' raises it head, and is resolved, than another shows up to again retard the significant adoption of SSDs in the top-to-bottom computer line up. To the rescue, to continue the march to improved storage performance economics, come more improved caching systems (see Denali CTO Mark Gogolewski's talk), more software tools and a better understanding of system 'usage models', which get more out of less. This evolutionary process, without huge leaps into the SSD unknown, nor buy-in of fast evolving, expensive and (some say) unproven technologies, is making the transition to total solid state both more measured, but also less risky.

Still today, big unknowns still lie ahead for SSDs (or, as it were, the 'known unknowns' like "what will be the cost, and performance impact of x4 cells and sub-25nm processing?), just as the industry probably under-appreciated the issues it would face in displacing a significant fraction of those HDDs that were in computers, from the vantage point of back in 2004 and 2005.

Performance NVM market: In fact, even though ONFI has been here for several years, and toggling for only slightly less, the high speed NAND flash market is still in its infancy. It is still viewed as having undiminished promise to deliver NAND and SSD bandwidth in multiples of what is widely available today. Ed Doller, in his kick-off keynote, showed a slide of today's NVM applications, dominated today by NAND, in which a huge fraction of the GB lodged in low-performance end of the spectrum: USB cards, DSC chips, Compact Flash, MP3 players. No wonder they can use x3 cells, with sometimes 10K or even 1K write cycles endurance.

There remain strong believers in a high-end promise of the fundamental NAND technology, which includes the vast majority of NAND-based SSDs, as well as heretofore unrecognized applications. Indeed, much of the Performance NAND effort today is truly pathfinding and technology development, and every week brings a new product announce which sets a new high standard for R/W performance, endurance or cost-performance. All in all, 'Performance NAND' is just getting started, with standards, technical capabilities, and applications all evolving lock-step to exploit what is widely felt to be NAND's huge performance and low-cost potential..

Almost from the beginning, no matter how much the talk was of HDD/vinyl/tape displacement markets, it was recognized that the "NAND-market-fitting" exercise would be comprised of developing its core technical promise, concurrently with developing applications that can project those technical benefits into a product that the market would buy. There has been a constant back-and-forth between NANDers, saying "Here's what we can offer, what we can do"...and users who were seeking to define their uses, and refine their spec and performance needs, to match those of the silicon suppliers.

The devil is in the details: Heading down that same 'spec' and 'performance capability' road, we also heard in Numonyx, EasyCo and others' talks, that software and improved system design can deliver significant improvements in NAND endurance, bandwidth and RW performance...only it is not here yet, and faces an uncertain market--more of the NAND 'Double Do' Problem: what can the silicon do and what does the application need. These are very much two moving targets, with the entire industry trying to sort it out. These several talks posited a new lever that the designer could pull for system performance improvement: delving into the exact details of how the device was to be used, or was being used...'usage models'...and applying more system and silicon knowledge to take advantage of unique features of the application or the silicon.

Repeat after me: Market Fragmentation is coming...or maybe not: If I heard the words "Fragmentation of Product Mix" once, I heard it a hundred times in the course of MemCon. The market needs a more diverse mix of DRAMs and NAND flash to best serve its technical needs and low cost requirements. For markets which place huge pressures on commoditizing their constituent products, and 'terminate with prejudice' any attempt to add bells and whistles, this is a new froce that has to be reckoned with...and we can only wait to see where it comes down. It does not appear that gravity can pull the pieces together, either for NAND or for DDR3 DRAMs. New products, and new applications of available flash and DRAM technology, will appear and be accepted or rejected by the market.

For DDR3 DRAMs it is now, PC DDR3 and DDR3L(V) for 'low voltage', which, instead of the Standard 1.5V, can be 1.35V and maybe eventually 1.2V), plus Low Power DRAMs...LP DRAM, Mobile DDR and LP DDR2, plus Graphics DRAMs (or G DRAMs). For NAND, the SLC of 2004 has become MLC and now soon x3 from some vendors; most expect an eventual x4 cell that can store four bits, with yet t.b.d. performance and cost for the 'degraded sockets'...and another shoot out the top for HS NAND flash: toggle of ONFI interfaces and roadmaps.

Efforts to pull all these contradictory and conflicting trends together, to reduce the product set to a small number of parts, are being thwarted by application trends that need either low cost or high performance, to nearly the exclusion of the other characteristic.

All of that is just my 'tip of the iceberg'. There's much more on the Denali MemCon website, www.denali.com/memcon, which has PDFs of all the presentations, actual webcasts of some presentations (with audio), and a MemCon Community website with discussion links to like-minded attendees and others interested in the discussion and topic of this year's MemCon.

Again, we'd like to thank our Platinum Sponsors, Samsung and Rambus, our Gold Sponsor, Numonyx, and our Silver Sponsors, EasyCo, SanDisk and SPMT. We'd also like to thank our track sponsor and Conference Partner, Web-feet Research for their support. We know how scarce funds have been since the fall financial meltdown, and appreciate their continued support.

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The Denali Memory Report addresses trends, analysis, and news for the semiconductor memory industry. The blog is designed to provide practical and unbiased analysis of the memory market, including vendor profiles, technology roadmaps, price/supply outlooks, and other news developments.

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