Foremay’s EC188 M-series Model-V SSDs is now available in a 2-Tbyte version for 3.5-inch drives and a 1-Tbyte version for 2.5-inch drives. Both drives employ SATA interfaces and have maximum random read/write speed ratings of 200 Mbytes/sec. The drives are targeted at enterprise server applications and employ 24-bit ECC. http://www.foremay.net

Note: Denali's MemCon is Wednesday of this week, so there will likely be a news hiatus for a few days followed by a flood of new and interesting ideas after the conference. Also, the SPMT Consortium and Marvell are hosting a panel on SPMT (serial port memory technology) at the monthly meeting of the Santa Clara chapter of the IEEE Consumer Electronics Society on Tuesday night and there may still be seats available (limited to 100). Online registration for MemCon is now officially closed, but you can still register at the door on Wednesday. For info on MemCon, click here. For info on the SPMT panel, click here.

Micron has done a very smart thing (note to marketers: take matters into your own hands!) and has posted detailed summaries of all the technical presentations its people will be making at next month’s Flash Memory Summit (August 17-19). All of these presentations but one are about NAND Flash semiconductor memory. One is about PCM (Phase change Memory). I am shamelessly reproducing the summaries here:

Micron Keynote Presentation

Flash Memory: The New Technology Driver, Ed Doller – Vice President and Chief Memory Systems Architect

Flash memory is at the heart of transformative consumer products, including smartphones and tablet PCs. It also has a home as the performance operator in data center servers and storage boxes. No one can question the technology is in high demand and is the new driver in process technology. The next decade is all about memory. The real question is which of the three types of flash memory – NAND, NOR & PCM – will remain and will the flash memory of today be viable into the future?

Today, NAND is widely recognized as the predominant flash memory technology, but NOR flash memory serves the needs of applications around the world, and entirely new product categories being defined using phase change memory (PCM). In this keynote Ed Doller, Micron VP & Chief Memory Systems Architect, will shed some light on the flash memory requirements for end applications and summarize which class of flash is best suited for given environments.

And as each of these flash memories continue to scale, management of the technology becomes more complex. Mr. Doller will highlight some of the management techniques being designed today to keep pace with each new flash generation.

Micron Presentations

NAND Flash Security, Michael Abraham – NAND Applications Engineering Manager

In many storage applications, data security is critically important. Some applications require data that is no longer needed be permanently removed from the storage medium so that it is no longer recoverable through both simple and complex methods. This presentation details how data can be made unrecoverable on NAND Flash.

NAND Flash Architecture and Specification Trends, Michael Abraham – NAND Applications Engineering Manager

As NAND Flash continues to shrink, page sizes, block sizes, and ECC requirements are increasing while data retention, endurance, and performance are decreasing. These changes impact systems including random write performance and more. Learn how to prepare for these changes and counteract some of them through improved block management techniques and system design. This presentation looks at these NAND Flash requirements across both consumer and enterprise segments.

NAND Flash Scaling is “EZ”: A Technical Tutorial on the Solutions Available for NAND to Continue its Rapid Growth, Pete Feeley – Director, System NAND Architectures

As the memory industry emerges from the deepest down-turn in its history, NAND flash promises to continue its record breaking growth. Technology scaling is the engine for that growth but is also seeing increasing barriers that threaten to slow it down. This tutorial discusses the history and future of NAND flash error management. Traditional solutions are facing scaling limits and new solutions are needed. What will those look like? How will they impact the integration of NAND Flash? Answers to these are central to the future scaling of NAND and are discussed in detail.

ONFI 3.0: The Path to 400MT/s NAND Interface Speeds, Terry Grunzke – Senior Applications Engineer

As NAND Flash technology progresses, achieving high performance while maintaining reliability becomes more difficult. The Enhanced ClearNAND devices contain a stack of high-density NAND flash packaged with an ECC controller that includes features to accommodate high-capacity designs while minimizing pin requirements and delivering improved NAND performance and reliability via an “enhanced” NAND command set. This presentation will review these new features in accordance with sample applications that will benefit by utilizing these Enhanced ClearNAND features.

Migrating Consumer Application Platforms to the Latest NAND Technology, Carla Lay – Applications Engineer

Platform stability is critical for many consumer applications though the existing platforms do not always allow the lowest-cost NAND Flash solution to be used. EZ-NAND Flash devices alleviate the NAND Flash ECC requirement by providing ECC within the Flash device, and allow consumer platforms to be used across multiple NAND Flash technology generations. This presentation will highlight certain considerations that must be accounted for in order to implement EZ-NAND within legacy consumer systems.

Improving NAND Performance Using Upcoming Features, Carla Lay – Applications Engineer

As NAND Flash technology progresses, achieving high performance while maintaining reliability becomes more difficult. The upcoming NAND devices contain a stack of high-density NAND flash packaged with an ECC controller that includes features to accommodate high-capacity designs while minimizing pin requirements and delivering improved NAND performance and reliability via an “enhanced” NAND command set. This presentation will review these new features in accordance with sample applications that will benefit by utilizing these upcoming NAND features.

NAND Flash Endurance & Performance Requirements for Smartphones, Tracy Seaman – Senior Applications Engineer

Advancements in NAND Flash process technology have enabled fabrication on tighter geometries resulting in higher-density NAND Flash devices. With proper wear leveling, the number of Program/Erase cycles can be reduced on these NAND Flash devices while still providing adequate endurance for most smartphone applications. This presentation will focus on smartphone usage model data and analysis for the purpose of identifying the true Program/Erase cycle requirements. In addition we will compare system level performance of various NAND technologies in smartphone systems.

Will Phase-Change Memory (PCM) replace DRAM or NAND Flash?, Mostafa Abdulla – High-Speed Engineering Manager

LPDDR2 is a DRAM and Non-Volatile Memory (NVM) interface standard for attaching memory to high-performance mobile systems. Some LPDDR2-NVM Phase Change Memory (PCM) devices have latency in the same order of magnitude as DRAM, could reduce cost and power consumption in the system, and can offer reduced application start time and reduced boot time through execute-in-place (XiP) operation. Is LPDDR2 NVM supplemental to existing technologies, or does it replace DRAM or NAND Flash? This paper will analyze the latest publicly available data on LPDDR2-NVM, draw comparisons on power usage based on today's devices, and discuss how the hardware and firmware in the system would change to take advantage of LPDDR2-NVM memory.

If that alone is not enough to make you want to sign up for the Flash Memory Summit (FMS), I don’t know what is. However, remember that Micron is not the only company speaking, presenting, and exhibiting at FMS. There are many, many more. Register for FMS here: http://www.flashmemorysummit.com/

Yesterday, preregistration attendance for MemCon 2010 jumped the 600 threshold. Today, it’s fast approaching 800 with about a registration coming in every minute or two. I guess everyone was waiting for the 1-week-to-go warning bell. In any case, I’m not sure we’ve ever tried to cram that many people in the room. On the other hand, there sure are some excellent networking opportunities to be had among this bunch of attendees. Representatives from all the major semiconductor vendors will be there. Ditto the major semiconductor ASSP and SOC vendors. Megaditto the major systems houses. Clearly, there will be too many to meet at the one-day event, but that doesn’t mean you can’t try.

You now have less than one week left, so hurry to make sure you get in before the doors close forever on MemCon 2010. For free registration and admission to MemCon 2010, click here.

Memory-module vendor PNY has just announced its Optima line of 2.5-inch SSDs with SATA II (3 Gbps) interfaces available in 64- and 128-Gbyte capacities and listing at retail for $199.99 and $349.99 respectively. Sequential read/write speed for the 64-Gbyte Optima drive is spec’ed at 220 (read) and 100 (write) Mbytes/sec. Sequential read/write speed for the 128-Gbyte Optima drive is spec’ed at 235 (read) and 150 (write) Mbytes/sec.

PNY is just the latest memory-module vendor to enter the SSD arena in a search for new markets to dominate, demonstrating once again that SSDs really lower the bar to entry versus the precision mechanical manufacturing requirements of hard-drive manufacturing. Any company with experience in board-level manufacturing (or a good contract-manufacturing house) can purchase off-the-shelf SSD controllers, firmware, and NAND Flash chips—even entire SSD designs—and get into the SSD market pretty darn fast. So if manufacturing and design expertise are rapidly diminishing as differentiators in the SSD market, what’s next?

You have only one more week to sign up for MemCon 2010! It’s the one day this year you’ll hear everything you need to know about DDR SDRAM. This year’s MemCon focuses on fast SDRAM, which is a key system component in servers, PCs, notebooks, netbooks, tablets, pads, and embedded systems. Oh, and mobile phones too. SDRAMs cross all design borders: power, price, performance, processor architecture, multicore, many core…you name it. MemCon 2010 will answer your questions. But, just in case the presenters do not answer your questions, you are certain to find the person who can answer your questions among the 600+ attendees.

This year, the event includes:

• Keynotes from IBM, Intel, SMART Modular, SanDisk, Dell, Samsung, Micron, and Seagate
• Forums and tutorials on enterprise storage systems, architectures, caching, application integration, SSDs, embedded applications, and cloud computing
• Special Plenary Session on Green Flash explains how flash can save energy in data centers
• Market Research Session features top analysts

This event is open free to qualified individuals.

Once it’s over, you’ve lost your chance for another year.

Registration has zoomed past 600 and the room is now getting very, very crowded. You only have one week left, so hurry to make sure you get in before the doors close forever on MemCon 2010. For free registration and admission to MemCon 2010, click here.

This blog has discussed an up-and-coming serial memory-interface technology called SPMT and you now have a chance to spend a couple of hours learning about it firsthand, for free. The Santa Clara chapter of the IEEE’s Consumer Electronics Society is sponsoring an evening panel discussion on Tuesday, July 27, which is the night before MemCon 2010.

Jim Venable, President of the SPMT Consortium and Dr. Sehat Sutardja—CEO, President and Chairman of Marvell Semiconductor—will speak at length about SPMT followed by a panel discussion with representatives from memory vendors Samsung and Hynix and IP powerhouses ARM and Silicon Image. The panel moderator is Steve Leibson (your humble blog journalist for the Denali Memory Report). The event starts at 6 pm and will end at 9 pm. Free drinks and food! But the event can only accommodate the first 100 people who sign up so get going. You can sign up here.

A member of Overclock.Net going by the handle Kiggold just posted two screen shots from HD Tune Pro 3.00 showing the throughput of an Intel X-25M 80GB SSD when new and after 45 days. When new, the drive took a little time to come up to speed and then stabilized at an average transfer rate of 233 Mbytes/sec. After 45 days, HD Tune Pro shows that the SSD’s average transfer rate has dropped to 226 Mbytes/sec, which is a negligible reduction in average transfer rate. However, HD Tune Pro’s performance traces show that after 45 days, the SSD’s transfer rate drops periodically. Looks like garbage collection to me. In any case, as long as average throughput is all you need, you’re OK. If your application can’t stand large latency swings, then you should look a little deeper into the drive’s behavior.

A new hands-on article written by Patrick Schmid and Achim Roos just appeared on the Tom’s Hardware site (“How Much Power Does Low-Voltage DDR3 Memory Really Save?”). The article takes an in-depth, real-world look at 1.35/1.25V DDR3 SDRAM power consumption versus DDR2 SDRAM power consumption in a PC environment. Here’s the meat of the conclusion:

“There are more interesting differences in power consumption, though, which brings up back to the [Kingston HyperX DDR3 SDRAM] LoVo series. Idle power decreases only by 0.5 W when going from 1.5 V to 1.35 V and by another 0.5 W when switching to 1.25 V. This isn't much, but considering that the rest of the system remains unchanged, it's something. Peak power decreases from 178 W and 180 W at 1.5 V (DDR3-1333 and -1600 speeds) to 174 W and 177 W at 1.25 V and 1.35 V. While these numbers are certainly not very relevant to desktop PCs, the measured power consumption differences can become important once you start to power-optimize all other system components. At the end of the day, a few watts difference on a low-power desktop PC like our 25 W Core i5 system becomes quite relevant.”

What Schmid and Roos observed is that the use of low-voltage DDR3 SDRAM cut system power by about a Watt at idle and by as much as three to six Watts at peak operating loads. When the overall system dissipates well more than 100 Watts, as do most high-end multicore PCs, the relative power saving from low-voltage DDR3 SDRAM isn’t much. However, designers of mobile and wireless embedded systems that employ low-power processors try to squeeze every milliwatt out of the system design to prolong battery life and talk time, so a few Watts of power savings is a very big deal indeed.

Note: Memcon 2010 is a little more than two weeks away and we’ve already blogged about the terrific keynotes, presentations, and panels that will take place. More recently, we discussed the immense networking opportunity that’s also part of the event. A huge number of attendees from memory vendors, system vendors, and research firms are attending this year and July 28 at MemCon 2010 may be the only chance you’ll get all year to meet and speak with them as fellow attendees.

This event is open free to qualified individuals.

Once it’s over, you’ve lost your chance for another year.

Registration is nearing 600 and the room is getting pretty crowded, so please hurry to make sure you get in before the doors close. For free registration and admission to MemCon 2010, click here.