/ Denali Memory Blog
 

Young Choi, Guest Blog for Denali Software

January is a time where lots of planning and forecast are made, with high hopes usually. Semiconductor memory industry, after several years of prolonged downturn, finally started to see some glimpses of recovery lately. Prices are improving, product migrations happening, new process node migration providing production efficiency and hopefully more profitability to the manufacturers.

The information and data that UBM TechInsights has been collecting on commodity DRAM and NAND Flash products clearly show how semiconductor memory industry has been improving their efficiency measured in terms of Mbit per mm2.

For commodity DRAMs, the latest 40 nm class DRAM products show their efficiency of 34Mbit per mm2. When compared to the previous 50 nm class DRAM, 40 nm class shows over 40% improvement. When cost per bit matters the most, 40 nm class DRAM will clearly provide the much needed cost advantage to those manufacturers who have this technology. For those who don’t, they need to find a better way of securing their profitability. When innovation and investment are the name of the game, the gap between the haves and have-nots are obvious, and hence, there is constant movement of joint ventures and merger and acquisitions to create economies of scale. Recent movement of Micron and Elpida, with their respective partner companies in Taiwan, is a clear sign of this. Perhaps later in 2010, we might be able to see the first 4F2 cell based commodity DRAM products. While some DRAM manufactures still have products with 8F2 cell, new 4F2 cell designs combined with smaller geometry would deepen the gap between DRAM makers.

DRAM Efficiency Trends

For NAND industry, the trends have been staggering. Introduction of 30 nm class products certainly has contributed to the higher efficiency of commodity NAND Flash products for sure. For NAND, luckily three-bit per cell (X3, TLC or 3-bit MLC) and four-bit per cell (X4, or 4-bit MLC) also helped push the envelope further beyond the lithographical limit in terms of bit density (Mbit per mm2). While all of the major NAND manufacturers (Samsung, Toshiba/SanDisk, Intel/Micron and Hynix) have announced their three-bit per cell and/or four-bit per cell NAND products, there are still some concerns about their reliability and performance. This is reminiscent of the times when MLC (two bit per cell) based NAND products were first introduced. The industry and the market had managed the reliability and performance issues successfully and MLC had become the mainstream NAND technology in many data applications. One can expect that the same would happen to three- and four-bit per cell NAND technology, eventually.

NAND Flash Efficiency Trends

While the past history or performance of the two key commodity memory technologies, DRAM and NAND, has been impressive and even remarkable, the future has a lot of uncertainties. To help us understand what to expect in the future, the presentation which was given by Kinam Kim at Samsung can be a good reference. This was also published on the Semiconductor International website. A patterning limit chart is shown below:

Patterning Limit

Of course, patterning limit is not the only obstacle to achieve more efficient DRAM and NAND products. There are many other technical challenges for DRAM cell, storage capacitance, isolation, leakage, reliability, floating gate vs. charge trapped flash, double patterning, immersion lithography, so on and so forth. What about new technologies to make DRAM storage cell a thing of past? What about 3D memory?

It appears as though the semiconductor memory industry is following the curves shown above (fairly closely so far). The 40 nm class DRAM products and 30 nm class NAND Flash products that were announced in 2009 are the proof. The real test within the industry will come in 2010. Will we see 30 nm class DRAM in 2010? How about 20 nm class NAND Flash? It remains to be seen but some early signs seem pretty promising. It’s January, a month of high hopes and expectation and a lot of planning for another year. Let’s hope for the best of the semiconductor memory industry in 2010.

PS: 2010 is a New Year for us as a company, too. Semiconductor Insights, which has been a leader in providing technical intelligence and intellectual property professional services to the semiconductor industry is now called “UBM TechInsights”.

For various DRAM and NAND Flash analysis reports (process analysis, circuit analysis and waveform analysis/functional testing) on the latest 40 nm class 1Gbit DDR3 SDRAM, 30 nm class 32Gbit MLC NAND Flash, 30 nm class 32Gbit Three-bit per cell NAND Flash, 40 nm class 32Gbit Three bit per cell NAND Flash, please visit UBM TechInsights’s Open Market Reports page.

By Steve Leibson for Denali Software

IDC’s Research Director John Rydning and Micron’s Director of SSD Marketing Justin Sykes tackled the merging abilities of fast enterprise-class SSDs and evolving disk interface standards, particularly SATA 6G (also called SATA 6.0) and USB 3.0, while speaking on a panel about the technology of storage during the Storage Visions 2010 conference held early this year in Las Vegas. Rydning spoke first and he compared and contrasted two new external disk-interface standards, namely USB 3.0 and eSATA 6.0. These standard disk interfaces improve on their predecessors. USB 3.0 maximum data rates are 3.2 to 4.8 Gbps versus USB 2.0’s 480 Mbps—a 6.7x to 10x boost in theoretical I/O performance. SATA 6.0 and eSATA 6.0 essentially double the theoretical maximum data rate of SATA 3.0 and eSATA 3.0 from 3 Gbps to 6 GBps. Consequently the new SATA 6.0 and eSATA 6.0 interfaces are theoretically faster than the new USB 3.0 interface just as SATA 3.0 and eSATA 3.0 are faster than USB 2.0.

The SATA and USB standards seem to be in lock step with respect to adoption rates according to Rydning. He showed comparison graphs that forecast increasing adoption rates for both SATA/eSATA 6.0 and USB 3.0, with some minor amount of adoption in 2010 and about 50% market penetration for each interface by the year 2012.

To aid this transition, laptop makers have started to build eSATA interface ports into laptops. This is not a particularly difficult feat because most motherboard chipsets include several SATA ports so implementing an eSATA port for such a machine is a matter of adding an eSATA connector to the laptop motherboard. For desktop and enterprise-class server systems, adding an eSATA port requires little more than a SATA extension cable that connects the motherboard SATA connector to an eSATA connector mounted on a metal expansion-card bracket or a case bulkhead because SATA ports are plentiful on most desktop and server motherboards. Rydning also pointed out that officially, eSATA connectors supply no power to the external SATA drive but connector manufacturers have developed an “unofficial” hybrid eSATA/USB 2.0 connector that allows a properly designed cable to tap into the co-located USB port’s 5V power while simultaneously coupling the eSATA disk-interface signals to the external drive.

Sykes’ panel presentation corroborated Rydning’s and provided some important test data to reinforce some of Rydning’s points and to make new ones. First, Sykes presented a historical chart showing the uneven throughput progress for SCSI and ATA disk interfaces as they evolved into the SAS (serial attached SCSI) and SATA (serial ATA) interfaces.

SATA disk interface data rates over time

SCSI/ATA/SAS/SATA disk interface data rates over time (Micron Technology)

The graph shows that the SCSI disk interface led in throughput until both SAS and SATA interface standards hit 3 Gbps around 2005. With the development of a 6 Gbps standard in 2008, the SAS interface pulled ahead of the SATA interface and will remain in the lead even with the development of the new SATA 6.0 specification.

Sykes then showed a different sort of performance graph for an existing MLC (multi-level cell) SSD using SATA 3.0 and SATA 6.0 interfaces:

MLC SSD performance with SATA 3.0 and SATA 6.0 interfaces

MLC SSD performance with SATA 3.0 and SATA 6.0 interfaces

The graph shows that sequential reads for this particular SSD benefit greatly from the faster interface although the read speed does not double with a doubling of the interface transfer rate. This result indicates that the SATA 3.0 interface definitely limits this SSD’s read performance. Although the SSD’s random read performance benefits some from the faster disk interface, the SSD’s sequential and random write performance essentially gains nothing from SATA 6.0.

These figures could lead you to the wrong conclusion, so take care in your interpretation. What the above figures do show is that the drive being tested was designed and optimized for the SATA 3.0 interface. In other words, the number of NAND Flash channels implemented in the tested drive is sufficient to support the SATA 3.0 data rate. Slapping a faster interface on this existing SSD architecture doesn’t produce a substantally faster SSD. To fully exploit the faster performance abilities of the SATA 6.0 interface, SSDs need more internal NAND Flash channels to boost internal read/write parallelism. That’s what Sykes’ next graph depicted:

Boosting NAND Flash channels increases SSD performance to SATA 6.0 rates

Boosting NAND Flash channels increases SSD performance to SATA 6.0 rates
(Micron Technology)

Increasing the number of NAND Flash channels implemented in an SSD substantially increases the SSD’s read and write speeds (using either multi-level-cell or single-level-cell NAND Flash devices). In fact, the theoretical performance of SSDs that support 16 or 32 active NAND Flash channels greatly exceeds the bandwidth of 6-Gbps disk-interface standards, which means that the SAS and SATA disk-interface standards will need to evolve even further to keep pace with future SSD developments.

By Steve Leibson for Denali Software

If you’re waiting for solid-state drives (SSDs) to overtake hard-disk drives (HDDs) as the storage device of choice in computers, servers, and consumer devices then Objective Analysis’ Jim Handy has a message for you: It’s not happening any time soon. Handy’s been following storage trends for many years. He’s tracked the pricing trends of HDDs for a while and SSDs for their short but dynamic life. Based on his presentation at the recent Storage Visions 2010 conference in Las Vegas, here’s what Handy forecasts:


Courtesy of Objective Analysis (www.objective-analysis.com)

The cost/Gbyte for HDDs is roughly 20x lower than for SSDs and Handy expects that relationship to be stable for the next 20 years. Sure, the cost/Gbyte will decrease for both types of storage device, but HDDs will remain the low-cost leader for high-capacity storage.

These predictions are built on some “basic truths”:

These raw numbers are fascinating, but the implications for storage consumers and marketers are even more interesting. For example, Handy asked the question “What can you do with $10 of NAND Flash memory now and what will you be able to do with it in twenty years?” He answered that question with the following graph:


Courtesy of Objective Analysis (www.objective-analysis.com)

Today, you can store about a thousand songs on $10 worth of NAND Flash memory. You can store perhaps one or two standard-definition (DVD-quality) movies or two HD (Blu-ray quality) movies. As NAND Flash capacities rise, you’ll be able to store more music and more movies for that same $10. Around the year 2026 or 2027, said Handy, you’ll be able to store the entire iTunes music catalog—all 10 million songs—on $10 worth of NAND Flash. That information nugget suggests that there will someday be consumer-class devices that will ship pre-loaded with every song you might ever want and that you’ll merely pay a fee to unlock the songs that you want to hear. Don’t believe it? Well, back in the year 2000, the music companies didn’t believe they’d be selling songs by subscription instead of quaint plastic discs called CDs. Now CD sales are way down and iTunes rules the roost with downloadable music.

Then Handy asked a similar question about HDDs: What can you do with a $50 HDD? Here’s the graph he showed to answer that question:


Courtesy of Objective Analysis (www.objective-analysis.com)

Today, you can store more than 100,000 songs or 100 DVD-quality movies on a $50 HDD. By the year 2017, you’ll be putting the entire iTunes catalog, all 10 million songs, on that same HDD. By the year 2025, you’ll be able to fit the entire Internet Movie Database (www.IMDB.com) movie catalog—500,000 films—on one $50 HDD. By then, once again, you may be buying a consumer product preloaded with every movie ever made and simply paying a fee to watch the movies you want.

Handy claims that people will eventually collect movies on hard disk as they do now for music. Currently, people buy or rent DVDs and Blu-ray discs rather than keep them in HDD storage but eventually media storage will be so inexpensive that even movies will disappear comfortably into the maw of a $50 HDD. A subsequent panel of teenager media users underscored that point at Storage Visions 2010. The young panelists described their current media-consumption habits. Unlike their parents, they never buy music CDs unless giving them as gifts. They download all of their music. However, they currently do want physical DVDs and Blu-ray discs. Their children probably won’t.

By Steve Leibson for Denali Software

Today, NAND Flash is king of the semiconductor memories in terms of cost per bit, a position it has held since 2004 or 2005. Consequently, NAND Flash serves as the technology driver for semiconductor processing—a position previously held by DRAM, processors, and FPGAs. The top NAND Flash semiconductor vendors are currently fabricating NAND Flash memories using 3x nm lithography (34nm for Intel and Micron, 30 nm for Samsung). By some technology estimates, there are now only two generations left in the life of NAND Flash as we know it today. At the current pace of NAND Flash generational development, two generations equals 36 months. After that, NAND Flash device capacity will clearly stall unless some new development changes the fundamental design of the NAND Flash semiconductor memory cell. That's not just alarmist talk for the purpose of controversy. One of the people making such claims is Micron's Dean Klein, Vice President of Memory System Development, who delivered these warnings in a keynote at Storage Visions 2010 held earlier this month in Las Vegas, just before CES.

The Incredible Shrinking NAND Flash Memory Cell
(From the keynote presentation by Micron’s Dean Klein)

Some of the looming NAND Flash problems involve the inability of smaller-geometry Flash memory cells to safely handle the high programming voltage (25V) needed to induce electron tunneling, memory-cell crosstalk, parametric degradation of dielectrics at shrinking geometries (layers are now just a few atoms thick), and the fact that NAND Flash cells are already so small that the presence or absence of fewer than 200 electrons on the floating gate makes the difference between a digital zero and a one. Because of these growing problems, said Klein in his keynote, it will be very difficult to employ semiconductor process geometries smaller than 20nm for existing NAND Flash memory cell design. Klein then took one step back from the brink by noting that people previously said NAND Flash could not break through the 40nm barrier but obviously it did.

Semiconductor process and design wizards found ways to overcome those limits and those same wizards are searching for ways to overcome the present problems, but there is not yet enough visible progress to believe that a solution is imminent said Klein. One possible path to a solution is to employ 3D or vertical NAND Flash cell stacking, which would double chip capacity without shrinking the memory cell size. If successful, 3D stacking could add another two NAND Flash generations and postpone the need for a NAND Flash replacement technology for five to eight years according to Klein. NAND Flash vendors will use 3D stacking if it proves sufficiently practical, but only if it's practical.

In the end, semiconductor vendors always take the path of least resistance, said Klein, and there are candidate technologies that promise non-volatile alternatives to NAND Flash. Klein listed MRAM (magnetic RAM), FRAM (ferroelectric RAM), PCM (phase-change memory), resistive RAM, and crosspoint memory as candidate replacement memory technologies. Again taking a step back, Klein then stated that all of these replacement memory technology candidates currently have warts but his personal pick for the eventual winner is PCM.

Micron isn't the only semiconductor vendor staring down the loaded barrel of the NAND Flash scaling problem. In a one-on-one interview just prior to Klein's keynote, Samsung's Flash Marketing Director Tony Kim said much the same thing. Going to smaller NAND Flash geometries is becoming very difficult said Kim. Vendors are investigating different materials and designs for the NAND Flash memory cell’s floating gate, different cell architectures, 3D stacking, and multi-level cells (storing more than one bit per physical memory cell). However semiconductor technologists can see that time is growing short, there is an end to the technology, and so they're all seeking a high-volume semiconductor technology that will overthrow the current king of non-volatile memory, NAND Flash.

By Steve Leibson for Denali Software

If you spend a lot of time reading and thinking about solid-state drives (SSDs), you may have gotten the impression that NAND Flash storage is at odds with hard-disk storage—that it's a winner-take-all situation. In his keynote at last week's pre-CES Storage Visions 2010 conference in Las Vegas, storage analyst Tom Coughlin dispelled that notion with some cogent slides and some insightful analysis. Coughlin founded the Storage Visions conference; he's the chairman of the annual Flash Memory Summit; and is the author of Digital Storage in Consumer Electronics published by Newnes Press in 2008. According to Coughlin’s free companion White Paper Flash & HDD – Symbiosis, or Survival of the Fittest (published under his Objective Analysis market-research banner), Flash-based consumer applications such as personal music and video players, digital still cameras, and camcorders actually contribute to additional sales for hard disk drives (HDDs).

Coughlin began his keynote remarks with the following forecast slide, which shows the shipped storage capacity for optical disk drives (ODDs), HDDs, and NAND Flash devices from 2006 through 2014. HDDs will still be carrying the bulk of the capacity load by the year 2014 but NAND Flash’s storage share will grow significantly, to 274 exabytes of storage shipped compared to 427 exabytes of storage for HDDs. (One exabyte equals one billion Gbytes.) Note that Coughlin's prediction suggests that 2014 will be the first year that NAND Flash annual shipped capacity will exceed the annual shipped capacity of optical drives.

Coughlin graph exabytes shipper for consumer

How do these immense numbers arise and where's the symbiosis between HDDs and NAND Flash memory? In his White Paper, Coughlin lists three examples of consumer applications where NAND Flash sales depend on and support HDD sales: digital still cameras (DSCs), personal music and video players (PMPs), and Flash-based camcorders.

According to Coughlin's White Paper, the average DSC user shoots an average of 549 photos per year and the average photo size is 4.7 Mbytes. That's roughly 2.6 Gbytes of photos per DSC user per year that needs storage. DSC and camera phone sales are rising at 5% per year, the average image size as measured in Mpixels is growing at 25% per year, and the number of photos that DSC and camera phone users are generating appears to be rising at a rate of 24% per year. Do the math and you'll find that the amount of storage needed to hold these photographs is increasing at a compound rate of 63% per year, based on Coughlin’s assumptions. As a result, almost two million drives per year will be sold to store digital images in 2014.

Couglin notes a similar symbiosis for HDDs with respect to PMPs. He writes that the average PMP owner's music and video storage needs are roughly 3:1 for HDD and PMP storage space. With the average PMP storage capacity now at 4 Gbytes, that's presently 12 Gbytes of HDD storage for each Flash-based playback device. In addition, most downloaded music and video must pass through a PC’s HDD (internal or external) before ending up on the PMP, which makes the HDD's existence that much more critical to PMP use. Again using some simple growth assumptions, Coughlin expects that PMPs will drive incremental HDD sales of 42 million just for music and video storage by 2014.

Using similar scenarios, Coughlin predicts that Flash-based camcorders will drive sales of an additional three million HDD sales in 2014 and online (cloud-based) storage for consumer images, video, and music will drive sales of an another incremental two million HDDs in 2014. The total comes to nearly 50 million incremental HDD sales annually—about 5% of total HDD sales—by the year 2014 as shown in the following figure. That’s symbiosis.

HDD's Supporting Consumer FLASH

And what does NAND Flash get from this relationship? Coughlin posits that the availability of inexpensive HDD storage encourages the sale of DSCs, PMPs, Flash-based camcorders, and other Flash-based multimedia consumer products. In the case of camcorders, he goes even further, claiming that a majority of the projected Flash-based camcorder sales “would never be sold if hard drives weren’t available.” That’s symbiosis.

“Altogether,” writes Coughlin in his White Paper, “our projected 2.2 exabytes of Flash memory [sales] in 2014 (estimated to be 59% of the total consumer Flash demand) would be significantly smaller if HDDs were not available to support them.” That truly is symbiosis.

So if you were thinking that Flash in the form of SSDs and other Flash-based storage arrays were going to kill off HDDs in the near future, Coughlin would strongly disagree. He sees a long, cooperative future ahead for the two technologies and he has published data publicly to back up that claim.

by Marc Greenberg, Director of Technical Marketing, Denali Software

Momentum for LPDDR2 is building. It's mostly in the mobile space, and it's been in the general area of Handsets, MIDs, and other mobile devices. Both high-end and low-end handset customers are seeking LPDDR2 support, which is interesting since LPDDR2 was initially thought to be a high-end technology. Long-term, LPDDR2 devices are expected in a lot of embedded applications where DDR3 is unsuitable for various reasons.

When it comes to building chips today, the LPDDR2 market is still maturing and device availability is just now coming on-line, so chip guys need to hedge their bets by supporting at least one other memory technology, sometimes more.

The first hedge for pure handset folks is an LPDDR2/LPDDR1 combo. This allows them to get into a low-power memory with LPDDR1 or LPDDR2 technology, but the performance for this combo is limited by LPDDR1 which has a maximum clock rate of 200MHz (DDR400) and in reality, 166MHz is the popular frequency for LPDDR1. So, this doesn't work for high-end solutions since they are sacrificing performance or would need to deploy a wider interface.

The second hedge is DDR2. DDR2 makes a nice combo with LPDDR1/LPDDR2 because the IO voltage of DDR2 is 1.8v, same as LPDDR1, so you don't need a different oxide in the IO if you were already supporting 1.8v for LPDDR1. DDR2 is the low-cost memory leader and available up to 533MHz (DDR1066) today. So the LPDDR1/LPDDR2/DDR2 combo has been popular for most of 2009.

Lately, more companies are looking forward at DDR3. DDR3 offers the advantage of a 1.5v I/O and for the most part DDR3 is built on smaller process geometries so uses less power in general. The chart below shows a comparison of different memory technologies at the same throughput. The take-away from this chart is that a 16-bit DDR3 running at 333MHz (DDR667) is about the same power as a 32-bit LPDDR1 running 166MHz(DDR333) so there is equal throughput and similar power usage between DDR3 and LPDDR1.

Click to enlarge

This is not a completely fair comparison -- there are lots of things not considered:

  • SSTL IOs of DDR3 use a lot more power than the LVCMOS pads of LPDDR1;
  • DDR3 needs termination which uses power;
  • Those 16 extra DQ pins (plus 2 DQ and 2DMs) required for LPDDR1 also use power;
  • LPDDR1 can go into a low power mode more often and more easily;
  • LPDDR1 uses less power in standby;
  • etc…

So, let's look at the decision-making process: if I am a high end mobile customer, I need LPDDR2, that much is certain. I probably want to hedge my bets with another memory technology to ensure that I have supply of some memory in case LPDDR2 is expensive or unavailable. If I choose LPDDR1, I need to put down 2X the IO pins for data to get into a part that uses 10% less power than DDR3, remembering that LPDDR1 was first introduced over 6 years ago. Or, I keep the same number of IO pins, use the most mainstream memory for 2010 and beyond (DDR3), and live with 10% more power usage in my memory.

Finally, with mask costs and chip development costs being what they are, everyone has an eye on being able to use their chip in more than one application space. Even if the chipset is primarily mobile, with the projected cost of DDR3 being less cost per bit than DDR2 starting in 2010, DDR3 becomes a "must-have" for new chip designs.

Click on a frame for slideshow view. Enjoy!

Hammered by market events, two significant memory suppliers suffer in Chapter 11 of bankruptcy. For one, Qimonda, it is almost over, as its assets are being liquidated just as the DRAM market shows near-life again. For the other, Spansion, the final chapter is yet to be written, but whatever emerges from its Chapter 11 bankruptcy later in 2009, it will likely be a far smaller and less potent player that it was in 2008 and 2007. Its highly regarded NROM/CTF technology, with numerous and far-reaching advantages over the more traditional Floating Gate flash technology, merits hardly a mention in its current survival and reorganization discussion.

This essay is a (or should we say, 'another'), discussion of important factors which enable some memory makers to survive while some are forced to withdraw, merge or disappear. It also strikes at the general naviete of calling our beloved 'memory segment' a part of 'the technology sector', when, in times like these, technical prowess plays a distant second, or third role is the quest for survival and success. Ultimately, technology is secondary to timely management right-decision-making, to product portfolio and positioning, to investment and mis-investment, to having a banker's prudence, and to having 'friends in high places', who can keep you on life support until a better day. Companies who considered themselves live-or-die-standalone businesses have mostly died; those who considered themselves de facto arms of government or larger business entities, or parts of 'banking groups', are still around...not well, but not dead, either.

Consolidation is nice, but..: Everyone calls for 'industry consolidation', but no one can describe exactly how it happens, and every instance is different from every other one. Even attempts to orchestrate mergers run into resistance. Creditors who have much to gain by tough and realistic decisions to foreclose enterprises, remain passive. Gaining consensus among all interested parties is nearly impossible, so long as anyone has any leverage...and everyone has enough to stall decisiveness and tough choices.

It is rarely a matter of two companies waking up one day and saying, "Today I will merge with so-and-so." Independence dies hard, as we have seen in the nearly-a-year-long shotgun (or BB gun, in this case) consolidation that has so far failed to combine ANY of Taiwan's four DRAM makers (or six, if Inotera and Rexchip are counted...or 10, if one includes Taiwan's technology partners Elpida, Hynix, Micron, and Qimonda). While partnerships have been made and other alliances have been broken, precious little 'consolidation' (and those only piecemeal and ragtag) have happened in ways that improve the industry’s efficiency and the survivability of its players.

The foremost two casualties of the present memory downturn who, so far, appear to have taken the biggest hits, are NOR/NVM maker Spansion, and the residual of Siemens-Infineon's memory group, Qimonda. Both have market and technical roots that are decades old...Spansion was a "Junior Intel" in EPROMs as long ago as the mid-1970s, as they were in Fast SRAMs and MPUs. Siemens, almost always a solitary outpost for EuroDRAMs, put its DRAM stake in the ground about the same time. So, it's been 30+ years for each of them. Each has had ups and down over the long haul and many 'cycles', but neither Qimonda nor its predecessors when it was a part of Siemens or Infineon, was ever the market leader that Spansion was, in NOR flash, until it finally cried "Uncle" for protection from its creditors. Indeed, it was not until the mid-1990s that Infineon showed its independence and original contributions in DRAM technology, until then relying mostly on licensed designs and technologies from Toshiba, IBM and Mitsubishi.

In 2007, before the memory downturn grabbed hold, Spansion was a $2.5B NOR flash player, and top of the game in the wireless space, with more than 35% share of the NOR flash market. Qimonda was the #3 DRAM maker, with revenues of more than $4.1B., with more than 14% of the DRAM market and a strong G-DRAM market position.

What counts, or seems to count, in today's market: Whatever their market standing, however, they have both been remarkable assemblages of technical talent in a world that is steadily moving to one of "Right Management Makes Right", easy access to friendly capital, and little mistakes with big consequences. Taking one's eye off the ball for so much as a few minutes can spell disaster...and in this business, many lethal balls are in the air, in surprising places, at all times. Still, that Powerchip and ProMOS, or even Hynix...each with far less technical talent that Qimonda and Spansion (IMHO)...can out-survive these companies tells us something about what it takes to stay alive in the economic downdraft and onslaught we have faced this round. The "Technology Sector" might rightly be named the "Friendly Banker Sector", as that seems more to determine who lives and who dies.

Investment timing and asset management count for a lot, and preemptive cash flow actions count for a lot. Low cost manufacturing is important, as always. Pricing leverage with key customers, to avoid the intense pricing in the commodity market spaces has counted for a lot this time. Technology counts for something, but is not the be-all and end all of success. At the end of the day, management's appreciation for, and response to, the pending crisis...what they realized, what actions they took, and when they took those actions...has shown itself to be the difference between life and death.

Oh, yes, and sadly, who your friends (with money and patience) were and are, was critical. Those who had the capacity to expose huge risks to their shareholders and creditors, and keep spending when all hope was lost, and then, when those pathways were exhausted, go back to their bankers and governments, have consistently dominated the more timid and business-prudent competition. Not that what they ended up with at the other end was 'good'...with its persistent low margins, large-and-larger capital calls for new fabs and new technology, and providing "long-term care" for businesses that they themselves created, but then were forced to suffer with 'until a sunnier day'.

Near Death today...Death Tomorrow: Since the early 1990s in memories (and sometimes before that, too), there was no 'sunnier day' ahead for profits that even came close to making up for the losses suffered in such 'survival downturns'. Not even close. The exception, the early-to-mid-1990s, saw a wholesale retreat by Japan from the chip market, leaving a vacuum for anyone to fill, profitably. Since the end of 1995, the 'memory industry' has been a net sinkhole for money, by a wide margin, though some players with some products have sometimes made it a good business. But, even in the industry's good times, the seeds of later destruction were already planted, but had not yet poked through the soil. Good profits were added to outside capital and plowed back into the industry, ensuring a supply glut later on and also, at the same time, that R&D had to be maintained at a high level to cost-reduce to meet those low prices.

Wise men (who left) and a very few excellent business men (who stayed competitive) made the right decisions, in retrospect; the vast majority of memory industry players stayed way past closing time, and when the final tally was completed, could only have been deemed failed business ventures.

But, if economic theory tells us anything, it says "Do not do this." Let the failures fail, clear the market, free up the resources to make useful product with true EVA--Economic Value Add. Otherwise, the industry will persist in taking two dollars of resources to make one dollar's worth of end product, creditors and shareholders will lose their investments, as the eventual day of reckoning will come.

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The Denali Memory Report addresses trends, analysis, and news for the semiconductor memory industry. The blog is designed to provide practical and unbiased analysis of the memory market, including vendor profiles, technology roadmaps, price/supply outlooks, and other news developments.

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