Products & Solutions
MMAV 08 Webcast
On-Demand Webcast

MMAV 08™ 2008

Now Available!

[IMAGE] Sanjiv Kumar

Listen to Sanjiv Kumar, Director of VIP Products as he presents an in depth look at the MMAV VIP architecture. (~22min.)

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Customer Quote

"There's simply no tool on the market other than MMAV that uses memory to verify the correct behavior of the system design. It has not only saved us hundreds of hours in verification time, but it has also enabled us to test our designs in ways we've never been able to before."

James Vig Sherrill
President, CEO
ASIC International

Utilizing Callback Features in MMAV
On-Demand Webcast

Utilizing Callback Features in MMAV

Now Available!

[IMAGE] Josh Filliater

Listen to Joshua Filliater, Field Applications Engineer as he presents several examples of using callbacks in a SystemVerilog testbench in a variety of advanced verification methodologies. (˜26min.)

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MMAV™ 2008

MMAV (Memory Modeler - Advanced Verification) verification IP is the industry standard solution for verifying memory interfaces and ensuring system correctness.

MMAV dramatically enhances verification by enabling you to observe and operate on system-level data transactions during simulation. This approach is key to optimizing regressions and accelerating your overall verification process.


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The new MMAV 2008 package (now available) has been upgraded with standard protocol support for AMBA, (AXI, APB, AHB), OCP, DFI, as well as provides new simulation models for mobile DDR (LPDDR), mobile DDR2, ONFi, GDDR4/5, eSD, eMMc and others. Additional new advanced features found in MMAV 2008 includes transaction callback, assertions report generation, and errors configurability. More info provided below.

Modeling and Simulation

Denali's MMAV product provides the most complete solution for modeling and simulating memory. We are committed to providing the highest quality models for any memory device, in any verification environment - and we meet this commitment every day for our customer base of over 500 leading edge companies.

MMAV utilizes a powerful and effective approach to modeling memory. The generic functionality of various memory classes and architectures are captured in a set of highly optimized 'C' models. The vendor-specific features and timing for any particular memory device are defined within a SOMA (Specification of Modeling Architecture) file. Once the MMAV model objects are linked into the simulation environment, modeling any type of memory is as simple as referencing the appropriate SOMA file for that particular memory device. MMAV automatically monitors all the timing and protocol requirements specified by the memory vendor.

The MMAV model objects are integrated to all popular simulation/verification environments, and Denali maintains a comprehensive database of over 15,000 SOMA files online at eMemory.com.

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Verification

MMAV offers tremendous benefits in any system-level verification environment. At a very basic level, MMAV provides direct access to memory through commands that enable you to read, write, save, preload, and compare memory contents at any time during simulation. For enhanced verification, MMAV provides robust assertions and callbacks to catch erroneous data transactions and difficult bugs associated with: un-initialized memory accesses, redundant reads, and data overwrites. These powerful assertions can trigger breakpoints to catch bad data transactions as they happen, not thousands of cycles later when/if the erroneous condition propagates data to an observable output.

  • Robust assertions
  • Error configurability
  • Transaction callbacks
  • Transition callbacks
  • Assertion reports
  • Creation of system memory

Callbacks catch erroneous data transactions and difficult bugs associated with: un-initialized memory accesses, redundant reads, and data overwrites. The powerful assertions can trigger breakpoints to catch bad data transactions as they happen, not thousands of cycles later when/if the erroneous condition propagates data to an observable output. Transaction callback enables to perform scoreboarding and coverage analysis.

A built-in address manager makes it easy to assemble any number of discrete memory components to form a contiguous memory address space, or "system memory". Any of the memory commands or assertions can then be applied to system memory. Other application-specific data structures include linked-lists and mirrored memory arrays.

Debugging

MMAV supports PureView, a powerful debugging tool that enables you to view and edit memory contents interactively, or during post-simulation analysis. PureView also provides concise memory transaction data in the form of a history window that displays the transaction history for the device, or all transactions associated with a specific memory location. PureView also accelerates waveform level debugging with popular tools such as Novas Debussy by enabling synchronized viewing of waveform information, memory data, and memory transactions.

Design, Verification, Debug

Denali verification IP is integrated with all popular EDA tools and languages, and supports advanced verification methodologies (ie. VMM, OVM, eRM, etc.) Our world-class support team works hard to ensure that you continually derive optimum value from your investment in Denali products.

Languages

  • Verilog
  • SystemVerilog
  • VHDL
  • C/C++
  • SystemC
  • Specman e
  • OpenVERA

Simulation/Verification Tools

  • C/C++, SystemC
  • Synopsys VCS, VERA, NTB
  • Mentor ModelSim Verilog/VHDL, Questa
  • Cadence NC Verilog/VHDL, Specman Elite
  • Coware N2C, ConvergenSC
  • Novas Debussey, Verdi
  • Mentor Seamless
  • Cadence SimVision
  • Denali PureView

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Denali, the Denali logo, and Denali Software, Blueprint, Databahn, eMemory, MMAV, PureSpec and SystemRDL are trademarks of Denali Software, Inc. All other trademarks are of their respective owners
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