| Memory Report |
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The Denali Memory Report (DMR) is now available online, in the form of weekly articles and quarterly
webcasts that address trends, analysis, and news for the semiconductor memory industry.
Access the DMR now!
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| Customer Quote |
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"The fast-paced WLAN market requires us to stay ahead of customers' needs by quickly delivering 802.11n solutions with best-in-class performance. Denali's Databahn memory controller IP provides the flexibility to configure solutions for a variety of applications, enabling us to satisfy the most stringent performance requirements without sacrificing time to market."
Walter Morton
Director of IC Design Engineering
Broadom Wireless LAN Group
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DRAM Solutions
Denali is a recognized leader in IP and EDA
solutions for deploying DRAM memory systems. Denali's DRAM related products, which include memory
device models, memory controllers, PHY and PHY specifications, are leveraged in an efficient ecosystem
of memory vendors, IP and EDA vendors, and ASIC and Foundry companies. Denali's DRAM deployment
solutions have been used successfully on thousands of chips spanning a wide range of end applications.
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| Denali DRAM Solutions: Quality, Availability, Ease of Integration |
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DDR Device Database: eMemory.com
In cooperation with its Memory Vendor Program (MVP) partners, Denali maintains the worlds largest, most complete database of memory device information. eMemory.com provides access to over 10,000 SOMA files, including the latest DDR2, DDR3, GDDR, and mobile DRAM devices.
DDR Verification IP: MMAV™
Denali's MMAV Verification IP product is the industry's most
widely used solution for modeling and simulating memory devices. MMAV utilizes SOMA memory device data to
enable the highest quality models, and provides direct integrations to all popular verification tools and languages.
DDR Controller IP: Databahn™
With over 250 design wins, Databahn is the most trusted
solution for deploying DDR memory systems. Databahn IP is fully configurable and programmable for bandwidth,
latency, power, and system-level performance. Databahn is silicon proven in over 100 chips spanning 27 process nodes.
DDR Hard PHY: Databahn™
The 3rd generation patented architecture of Denali's latest PHY takes PHY design to the next level and delivers a fully hardened solution which can be quickly and easily integrated into your design. The GDSII PHY is closed for timing and Design For Manufacturability (DFM) and completely incorporates the I/O pads. The PHY features a high-resolution analog DLL to provide extra timing margin to the board.
DDR PHY Interface: www.ddr-phy.org
Denali has teamed with industry leaders ARM, Intel, Samsung, and Synopsys to define a common interface protocol between memory controller logic and PHY interfaces, with a goal of reducing design and integration costs, while enabling performance and data throughput efficiency. The DDR PHY Interface (DFI) 2.0 specification (now available) is an open specification, available online at: www.ddr-phy.org
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| DDR Deployment Ecosystem |
Denali's products are leveraged throughout an efficient ecosystem comprised of the world's leading memory vendors, IP and EDA vendors, ASIC and Foundry companies, including internal and external resources for memory market research and analysis. Denali customers enjoy significant advantages in
quality and time-to-market for deploying DRAM memory systems for a wide range of end applications
ranging from mobile phones and multi-function printers, to world-class routers and computer servers.
For information on how you can leverage Denali's DRAM solutions, request an evaluation of the
appropriate products listed above, or contact our technical sales team directly today. |
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Memory Blog