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Blueprint

Blueprint automates the creation and management of control registers, and all related models, design views and documentation. From SystemRDL(Register Description Language) input, Blueprint with generators produce views for HW/SW development, verification, and documentation. Output formats include Verilog, System Verilog, C, C++, Frame, HTML, DocBook, SPIRIT IP-XACT XML, MS-Word and more. Blueprint is part of MMAV 2010 package which provides the necessary PureView license.

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Overview

The vast numbers of on-chip registers that are part of all complex designs define the software interface to the chip, and usually represent the largest portion of the chip specification or programmer's guide. Blueprint eliminates tedious and error-prone processes of manually managing registers, and enables design, verification and firmware teams to work more efficiently from consistent and synchronized views of the chip design.

Blueprint supports a pragmatic approach to system-level design that starts with our Blueprint Compiler and the SystemRDL Language. Blueprint allows users to capture register specifications textually using SystemRDL or translate from IP-XACT to SystemRDL. The Blueprint Compiler interfaces to custom generators, to generate necessary outputs and views for design, verification, documentation, software development, post silicon debug and even enables early software development with SystemC™ Transaction Level Models. Blueprint and generator tools ensure interoperability with other EDA tools by inputting and outputting IP-XACT and SystemRDL formats.

[IMAGE] BluePrint Architecture

Compiler/Generator

Blueprint Compiler & API:
The Compiler is the heart of Blueprint. Blueprint Compiler takes inputs created in SystemRDL and provides rich syntax and semantic checking and builds even the most complex of register maps-quickly! Blueprint Compiler also provides a rich API on which all the generators are based.

Generators:
Generators are freely available to all customers of Denali's MMAV product, to use and modify as they wish for use with Denali's Blueprint compiler. These generators were honed over years of working with customers and are provided as reference to the user community. You can find shared features, enhancements, feedback, limitations, and more in the community forum.

Inputs:
SystemRDL (Register Description Language) and IP-XACT XML

For questions about Blueprint, please contact Denali Sales

Customers

"Today's design teams are looking for methods to manage changes between the chip specifications and all the implementations used throughout the design and verification process. Our engineering teams wanted a single source for control register descriptions, and by using the industry-standard SystemRDL and Blueprint, have realized reduced integration time enabling us to meet our design requirements. Denali's Blueprint provides Cypress with an integral and reliable platform solution for SoC design."
Jennifer Sirrine
Senior Design Engineering Manager
Cypress Semiconductor