Abstract: This webcast will summarize the variety of power concerns that have emerged strongly in systems over the past few years, and will then focus on the specific set of issues and solutions in the mobile sector, and specifically on "Low Power DRAMs". The webcast will be "market and market characteristics" oriented in its focus. Issues to be covered will be the LP DRAM roadmap (compared to "PC DRAMs"), current and future LP DRAM product availability, LP DRAM features and variations, the changing demands of new mobile systems, and the challenges of future �reduced power DRAM' evolution.

Abstract: The key to success has been the marriage of urban infrastructure and hardware platform developments. Moreover, such mobile technology has been a key enabling factor in the delivery of "the computer experience" to most emerging markets. Why? It is due to Power! With unreliable power grids, if power exists at all, many emerging market computer users relish secured power. At the other extreme consumers in the developed world have almost a singular focus: battery life! Paradoxically it is future technology that brings our two worlds together.

Battery life is fast becoming the key product differentiator in many computer and consumer applications and devices. Battery technology, being somewhat finite, is fast reaching its limits leaving component level power consumption the only avenue to longer life, battery life that is! The choices facing designers today are complex and expensive. Often the linchpin to success of new electronic innovations is pegged to the power characteristics of component designs.

Tom Trill and JM Sung from Qimonda will review current trends in memory power consumption across the compute and consumer markets. This webcast presentation will also address some key technologies aimed at optimizing the power performance of memory components.

The power reduction benefits of using LP DRAM or Mobile DDR DRAM in a system depends critically on the use of the LP power-saving features in the DRAM-based memory subsystem. That being said, given a standard "LP DRAM", the ability of the system designer to optimize memory-subsystem power behavior depends on design and implementations of the memory controller. Denali's Databahn LP DRAM controller offers many features, user-selectable settings and design options to assist in taking full advantage of the LP DRAM chip's specific features, to achieve the required system performance at minimal power.

Marc Greenberg, Product Manager for the LP Databahn product line at Denali Software, brings the design experience of more than two dozen LP and Mobile DRAM designs to the discussion, will describe Denali's Databahn and PHY product, their features and how they are targeted to implementing minimal-power memory subsystems in a variety of mobile applications.