| DFI Webcast |
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For a comprehensive overview of the DFI v1.0 specification:
View the Webcast, today
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| Customer Quote |
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"The fast-paced WLAN market requires us to stay ahead of customers' needs by quickly delivering 802.11n solutions with best-in-class performance. Denali's Databahn memory controller IP provides the flexibility to configure solutions for a variety of applications, enabling us to satisfy the most stringent performance requirements without sacrificing time to market."
Walter Morton
Director of IC Design Engineering
Broadom Wireless LAN Group
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DDR PHY Interface (DFI) Online
The DDR PHY Interface (DFI) specification is a collaborative industry effort to define a common interface between the DDR memory controller logic and the PHY interface in order to reduce cost, time-to-market, and increase the potential for reuse of the individual components that make up the memory system. The latest version of the DFI specification, 2.0 which is now available, has been developed by expert contributors from recognized leaders in the semiconductor, IP and electronic design automation (EDA) industries, including: ARM, Denali, Intel, LSI Logic, Samsung and ST Microelectronics. The DFI Specification Rev 1.0 was released for production development in January 2007 and has received an overwhelming response with over 1,000 users from 500+ companies downloading the specification. The current version of this industry standard DFI specification 2.0 is now available for download. More about DFI.
Download the latest version of the industry-standard DFI specification! Version 2.0 - now available!
Participating Companies
Special thanks to the representatives from the following companies who have participated, and continue to contribute to the success of this effort:
More about DFI participants
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