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Career Opportunities
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| Verification Engineer - Sunnyvale, CA |
Responsible for verification of hardware design IP functionality and
deliveries to customers. This position will be expected to create test plans
and have the ability to execute portions or all of these plans for the
design IP. This position is also be responsible for debug and management of
customer deliveries including functional, timing, and environmental issues.
Management of regression environment for IP development is also required.
Responsibilities
- Create test plans for functional and timing verification of the memory controller design IP
- Manage the debug of regression analysis for the design IP
- Debug issues involved in the generation of customer deliverables
- Manage the list of customer deliveries.
Requirements
- Verification experience with design IP coded in Verilog
- Exposure to synthesis and STA reports and analysis
- Debug expertise in tool flow for Verilog based designs and netlists
- Understanding of simulation, synthesis and static timing products and their interfaces.
- BSEE or equivalent
Please email resumes to:
careers@denali.com
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