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Shalesh Thusoo
Hardware Engineering Manager
Cisco

Shalesh is an engineering manager at Cisco Systems, Inc. routing technology group. Shalesh is currently leading the next generation packet processor architecture team, as well as a one of the design teams responsible for implementing the current generation Cisco Packet Processor. Shalesh has been at Cisco for 5 years working on multiple packet processing chips used in mid to high end Cisco routers. Prior to joining Cisco Shalesh had managed and designed multiple general purpose processors implementing the Sparc, PowerPC and x86 instruction set. Shalesh holds 17 patents in the area of processor design and architecture.

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